CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip

Authors:
Victor Reyes;Tomas Bautista;Gustavo Marrero;Pedro P. Carballo;Wido Kruijtzer
Affiliations:
University of Las Palmas GC, Spain;University of Las Palmas GC, Spain;University of Las Palmas GC, Spain;University of Las Palmas GC, Spain;Philips Research Laboratories, The Netherlands
Venue:
DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
Year:
2004

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Abstract

As SoC complexity grows new methodologies and tools for system design and time-effective design space exploration are required. In this paper we introduce a tool called CASSE, what stands for CAmellia System-on-chip Simulation Environment. CASSE is a fast, flexible, and modular SystemC-based simulation environment which aims to be useful for design-space exploration and system-level design at different abstraction levels. The tool uses transaction-level modeling techniques for fast simulations and easy architectural modeling, and bridge the gap to system implementation by a progressive refinement approach. CASSE is being used in the European IST-2001-34410 CAMELLIA project, which focuses on the mapping of innovative smart imaging applications onto an existing video encoding architecture.