IRSIM: an incremental MOS switch-level simulator
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A variable-precision square root implementation for field programmable gate arrays
The Journal of Supercomputing - Special issue on field programmable gate arrays
A multiple-precision division algorithm
Mathematics of Computation
Synthesis of power-optimized and area-optimized circuits from hierarchical behavioral descriptions
DAC '98 Proceedings of the 35th annual Design Automation Conference
HYPER-LP: a system for power minimization using architectural transformations
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Maximally fast and arbitrarily fast implementation of linear computations
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Behavioral Synthesis for low Power
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
MPEG video decoding with the UltraSPARC visual instruction set
COMPCON '95 Proceedings of the 40th IEEE Computer Society International Conference
UltraSPARC-II: the advancement of ultracomputing
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
DSP Quant: Design, Validation, and Applications of DSP Hard Real-Time Benchmark
ICASSP '97 Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '97) -Volume 1 - Volume 1
Fugue for MMX [parallel programming]
IEEE Computer Graphics and Applications
Heuristic datapath allocation for multiple wordlength systems
Proceedings of the conference on Design, automation and test in Europe
High-level synthesis of multiple-precision circuits independent of data-objects length
Proceedings of the 39th annual Design Automation Conference
Static resource models for code-size efficient embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Multiple-Wordlength Resource Binding
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT
Journal of VLSI Signal Processing Systems
Bit-level scheduling of heterogeneous behavioural specifications
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Synthesis of saturation arithmetic architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
High-Level Synthesis with SIMD Units
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Low-power high-level synthesis for FPGA architectures
Proceedings of the 2003 international symposium on Low power electronics and design
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
Behavioural Bitwise Scheduling Based on Computational Effort Balancing
Proceedings of the conference on Design, automation and test in Europe - Volume 1
High-Level Allocation to Minimize Internal Hardware Wastage
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Performance-driven scheduling of behavioural specifications
Integration, the VLSI Journal
Frequent-pattern-guided multilevel decomposition of behavioral specifications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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