MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Journal of the ACM (JACM)
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
WCDMA for UMTS: Radio Access for Third Generation Mobile Communications
WCDMA for UMTS: Radio Access for Third Generation Mobile Communications
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Overcoming the limitations of conventional vector processors
Proceedings of the 30th annual international symposium on Computer architecture
A new look at exploiting data parallelism in embedded systems
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Evaluating the Imagine Stream Architecture
Proceedings of the 31st annual international symposium on Computer architecture
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
Software defined radio – a high performance embedded challenge
HiPEAC'05 Proceedings of the First international conference on High Performance Embedded Architectures and Compilers
Reducing idle mode power in software defined radio terminals
Proceedings of the 2006 international symposium on Low power electronics and design
The sandbridge SB3011 platform
EURASIP Journal on Embedded Systems
Hierarchical coarse-grained stream compilation for software defined radio
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Proceedings of the 45th annual Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe
Optimizing near-ML MIMO detector for SDR baseband on parallel programmable architectures
Proceedings of the conference on Design, automation and test in Europe
A coarse-grained array based baseband processor for 100Mbps+ software defined radio
Proceedings of the conference on Design, automation and test in Europe
Wireless innovation through software radios
ACM SIGCOMM Computer Communication Review
MPSoC Design Using Application-Specific Architecturally Visible Communication
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
A reconfigurable ASIP for convolutional and turbo decoding in an SDR environment
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
From SODA to scotch: The evolution of a wireless baseband processor
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Playing the trade-off game: Architecture exploration using Coffeee
ACM Transactions on Design Automation of Electronic Systems (TODAES)
AnySP: anytime anywhere anyway signal processing
Proceedings of the 36th annual international symposium on Computer architecture
Sora: high performance software radio using general purpose multi-core processors
NSDI'09 Proceedings of the 6th USENIX symposium on Networked systems design and implementation
Energy-performance Exploration of a CGA-based SDR Processor
Journal of Signal Processing Systems
Proceedings of the 11th Annual conference on Genetic and evolutionary computation
Modeling Scalable SIMD DSPs in LISA
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Architecture-aware LDPC code design for multiprocessor software defined radio systems
IEEE Transactions on Signal Processing
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
A VLIW vector media coprocessor with cascaded SIMD ALUs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Software defined radio for broadband OFDM protocols
SMC'09 Proceedings of the 2009 IEEE international conference on Systems, Man and Cybernetics
A customized cross-bar for data-shuffling in domain-specific simd processors
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Trends in low power handset software defined radio
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Design of a low power pre-synchronization ASIP for multimode SDR terminals
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
The next generation challenge for software defined radio
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Design methodology for software radio systems
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
COFFEE: compiler framework for energy-aware exploration
HiPEAC'08 Proceedings of the 3rd international conference on High performance embedded architectures and compilers
Customizing wide-SIMD architectures for H.264
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Diet SODA: a power-efficient processor for digital cameras
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Wireless network cloud: architecture and system requirements
IBM Journal of Research and Development
Sora: high-performance software radio using general-purpose multi-core processors
Communications of the ACM
An architecture for software defined cognitive radio
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Design of an application-specific instruction set processor for high-throughput and scalable FFT
Proceedings of the Conference on Design, Automation and Test in Europe
Resource recycling: putting idle resources to work on a composable accelerator
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
On chip interconnects for multiprocessor turbo decoding architectures
Microprocessors & Microsystems
A low-power DSP for wireless communications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
VEGAS: soft vector processor with scratchpad memory
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Energy Aware Signal Processing for Software Defined Radio Baseband Implementation
Journal of Signal Processing Systems
Analyzing the Next Generation Software Defined Radio for Future Architectures
Journal of Signal Processing Systems
Virtual base station pool: towards a wireless network cloud for radio access networks
Proceedings of the 8th ACM International Conference on Computing Frontiers
SIMD defragmenter: efficient ILP realization on data-parallel architectures
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Dynamic Reconfiguration Technologies Based on FPGA in Software Defined Radio System
Journal of Signal Processing Systems
Versatile design of shared vector coprocessors for multicores
Microprocessors & Microsystems
Semi custom design: a case study on SIMD shufflers
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
Reconfiguring the software radio to improve power, price, and portability
Proceedings of the 10th ACM Conference on Embedded Network Sensor Systems
Libra: Tailoring SIMD Execution Using Heterogeneous Hardware and Dynamic Configurability
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011)
CODIPHY: composing on-demand intelligent physical layers
Proceedings of the second workshop on Software radio implementation forum
Multicore-based vector coprocessor sharing for performance and energy gains
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors
Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Design Challenges for Many-Core Processors, Special Section on ESTIMedia'13 and Regular Papers
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The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a minimum. These implementations are time consuming to design and difficult to verify. A programmable hardware platform capable of supporting software implementations of the physical layer, or software defined radio, has a number of advantages. These include support for multiple protocols, faster time-to-market, higher chip volumes, and support for late implementation changes. The challenge is to achieve this without sacrificing power. In this paper, we present a design study for a fully programmable architecture, SODA, that supports software defined radio a high-end signal processing application. Our design achieves high performance, energy efficiency, and programmability through a combination of features that include single-instruction multiple- data (SIMD) parallelism, and hardware optimized for 16bit computations. The basic processing element is an asymmetric processor consisting of a scalar and SIMD pipeline, and a set of distributed scratchpad memories that are fully managed in software. Results show that a four processor design is capable of meeting the throughput requirements of theW-CDMA and 802.11a protocols, while operating within the strict power constraints of a mobile terminal.