An intelligent module generator environment
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Design and Analysis of Even-Sized Binary Shuffle-Exchange Networks for Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Architectural techniques for accelerating subword permutations with repetitions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Closing the power gap between ASIC and custom: an ASIC perspective
Proceedings of the 42nd annual Design Automation Conference
Closing the POWER Gap between ASIC & Custom: Tools and Techniques for Low Power Design
Closing the POWER Gap between ASIC & Custom: Tools and Techniques for Low Power Design
SODA: A Low-power Architecture For Software Radio
Proceedings of the 33rd annual international symposium on Computer Architecture
A customized cross-bar for data-shuffling in domain-specific simd processors
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
| Hi-index | 0.00 |
Power has become the most important candidate for optimization in today's design. This is necessary for further functionality and processing capability to be added to the design. Standard cell design is the defacto standard for most IC designs. The other end of the spectrum is full custom design whose efficiency is very high, but with a large design time. In this paper we investigate the use of prototype module generators to improve the energy efficiency of the design over the standard cell design while trading off some design time. We investigate this on an interconnect intensive design namely the SIMD Shuffler which is one of the important parts of a low power embedded processor's datapath. We show that using module generators, we can reduce the energy consumption of the shuffler by about 30%. We also show the possible research opportunities for filling in the further EDA tools for low power.