VEGAS: soft vector processor with scratchpad memory

  • Authors:

  • Christopher H. Chou;Aaron Severance;Alex D. Brant;Zhiduo Liu;Saurabh Sant;Guy G.F. Lemieux

  • Affiliations:

  • The University of British Columbia, Vancouver, BC, Canada;The University of British Columbia, Vancouver, BC, Canada;The University of British Columbia, Vancouver, BC, Canada;The University of British Columbia, Vancouver, BC, Canada;The University of British Columbia, Vancouver, BC, Canada;The University of British Columbia, Vancouver, BC, Canada

  • Venue:
  • Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
  • Year:
  • 2011

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Abstract

This paper presents VEGAS, a new soft vector architecture, in which the vector processor reads and writes directly to a scratchpad memory instead of a vector register file. The scratchpad memory is a more efficient storage medium than a vector register file, allowing up to 9x more data elements to fit into on-chip memory. In addition, the use of fracturable ALUs in VEGAS allow efficient processing of bytes, halfwords and words in the same processor instance, providing up to 4x the operations compared to existing fixed-width soft vector ALUs. Benchmarks show the new VEGAS architecture is 10x to 208x faster than Nios II and has 1.7x to 3.1x better area-delay product than previous vector work, achieving much higher throughput per unit area. To put this performance in perspective, VEGAS is faster than a leading-edge Intel processor at integer matrix multiply. To ease programming effort and provide full debug support, VEGAS uses a C macro API that outputs vector instructions as standard NIOS II/f custom instructions.