LISA—machine description language for cycle-accurate models of programmable DSP architectures
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
SODA: A Low-power Architecture For Software Radio
Proceedings of the 33rd annual international symposium on Computer Architecture
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EURASIP Journal on Applied Signal Processing
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IEEE Transactions on Computers
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SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Evaluation of ASIPs Design with LISATek
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
A customized cross-bar for data-shuffling in domain-specific simd processors
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
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Single instruction multiple data (SIMD) processing is an important technique for achieving high performance in applications with innate data level parallelism such as applications from the Software Defined Radio (SDR) domain. This paper investigates using the LISA 2.0 Language to facilitate the development of scalable SIMD digital signal processors (DSPs). Our work shows that limitations in LISA hinder the development of SIMD data paths; therefore, extensions to LISA that enable to generate a wide SIMD data path from a single scalar processing element have been introduced. Furthermore, generators for SIMD permutation networks with arbitrary SIMD widths have been implemented. The presented solution simplifies the development of scalable SIMD DSPs in LISA considerably.