An Adaptation of the Fast Fourier Transform for Parallel Processing
Journal of the ACM (JACM)
Organization of Large Scale Fourier Processors
Journal of the ACM (JACM)
The universality of various types of SIMD machine interconnection networks
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Fast Computational Algorithms for Bit Reversal
IEEE Transactions on Computers
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network
IEEE Transactions on Computers
The Indirect Binary n-Cube Microprocessor Array
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
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Generalized Connection Networks for Parallel Processor Intercommunication
IEEE Transactions on Computers
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A Shuffle-Exchange Network with Simplified Control
IEEE Transactions on Computers
The Generation of Permutations in Magnetic Bubble Memories
IEEE Transactions on Computers
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IEEE Transactions on Computers
Finite State Model and Compatibility Theory: New Analysis Tools for Permutation Networks
IEEE Transactions on Computers
A new interconnection network for SIMD computers: the sigma networks
IEEE Transactions on Computers
Programming cellular permutation networks through decomposition of symmetric groups
IEEE Transactions on Computers
A Characterization and Analysis of Parallel Processor Interconnection Networks
IEEE Transactions on Computers
FFTs on mesh connected computers
Parallel Computing
On the Rearrangeability of Multistage Networks Employing Uniform Connection Patterns
ADVIS '00 Proceedings of the First International Conference on Advances in Information Systems
Performing BMMC Permutations in Two Passes through the Expanded Delta Network and MasPar MP-2
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INFOCOM '97 Proceedings of the INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution
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ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
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IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
The Universality of the Shuffle-Exchange Network
IEEE Transactions on Computers
Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations
IEEE Transactions on Computers
Graph Theoretical Analysis and Design of Multistage Interconnection Networks
IEEE Transactions on Computers
Interference Analysis of Shuffle/Exchange Networks
IEEE Transactions on Computers
Task Preloading Schemes for Reconfigurable Parallel Processing Systems
IEEE Transactions on Computers
A Layout for the Shuffle-Exchange Network with O(N2/log3/2N) Area
IEEE Transactions on Computers
A versatile VLSI fast Fourier transform processor
AFIPS '84 Proceedings of the July 9-12, 1984, national computer conference and exposition
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Journal of the ACM (JACM)
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SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
On rearrangeability of tandem connection of banyan-type networks
IEEE Transactions on Communications
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In this paper a number of properties of Shuffle/Exchange networks are analyzed. A set of algebraic tools is developed and is used to prove that Lawrie's inverse Omega network, Pease's indirect binary n-cube array, and a network related to the 3-stage rearrangeable switching network studied by Clos and Bene have identical switching capabilities. The approach used leads to a number of insights on the structure of the fast Fourier transform (FFT) algorithm. The inherent permuting power, or "universality," of the networks when used iteratively is then probed, leading to some nonintuitive results which have implications on the optimal control of Shuffle/Exchange-type networks for realizing permutations and broadcast connections.