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IEEE Transactions on Computers
Computational frameworks for the fast Fourier transform
Computational frameworks for the fast Fourier transform
Journal of the ACM (JACM)
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ASAP '04 Proceedings of the Application-Specific Systems, Architectures and Processors, 15th IEEE International Conference
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Proceedings of the 42nd annual Design Automation Conference
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IEEE Transactions on Computers
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IEEE Transactions on Computers
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IEEE Transactions on Computers
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IEEE Transactions on Computers
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IEEE Transactions on Computers
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Proceedings of the 45th annual Design Automation Conference
Automatic generation of streaming datapaths for arbitrary fixed permutations
Proceedings of the Conference on Design, Automation and Test in Europe
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IEEE Transactions on Signal Processing
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IEEE Transactions on Signal Processing
Operand access in regular topology discrete trigonometric transforms
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Automatic generation of streaming datapaths for arbitrary fixed permutations
Proceedings of the Conference on Design, Automation and Test in Europe
Computer Generation of Hardware for Linear Digital Signal Processing Transforms
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Computer generation of streaming sorting networks
Proceedings of the 49th Annual Design Automation Conference
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This article presents a method for constructing hardware structures that perform a fixed permutation on streaming data. The method applies to permutations that can be represented as linear mappings on the bit-level representation of the data locations. This subclass includes many important permutations such as stride permutations (corner turn, perfect shuffle, etc.), the bit reversal, the Hadamard reordering, and the Gray code reordering. The datapath for performing the streaming permutation consists of several independent banks of memory and two interconnection networks. These structures are built for a given streaming width (i.e., number of inputs and outputs per cycle) and operate at full throughput for this streaming width. We provide an algorithm that completely specifies the datapath and control logic given the desired permutation and streaming width. Further, we provide lower bounds on the achievable cost of a solution and show that for an important subclass of permutations our solution is optimal. We apply our algorithm to derive datapaths for several important permutations, including a detailed example that carefully illustrates each aspect of the design process. Lastly, we compare our permutation structures to those of Järvinen et al. [2004], which are specialized for stride permutations.