Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
The Gamma network: A multiprocessor interconnection network with redundant paths
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
MIMD machine communication using the augmented data manipulator network
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
Processor-memory interconnections for multiprocessors
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Banyan networks for partitioning multiprocessor systems
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
Notes on Shuffle/Exchange-Type Switching Networks
IEEE Transactions on Computers
Data Manipulating Functions in Parallel Processors and Their Implementations
IEEE Transactions on Computers
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems
IEEE Transactions on Computers
The Indirect Binary n-Cube Microprocessor Array
IEEE Transactions on Computers
Parallel Permutations of Data: A Benes Network Control Algorithm for Frequently Used Permutations
IEEE Transactions on Computers
Fault-Diagnosis for a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
A Shuffle-Exchange Network with Simplified Control
IEEE Transactions on Computers
Fault-Tolerant Multiprocessors with Redundant-Path Interconnection Networks
IEEE Transactions on Computers - The MIT Press scientific computation series
Flexible oblivious router architecture
IBM Journal of Research and Development
The Journal of Supercomputing
ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
ISPA'04 Proceedings of the Second international conference on Parallel and Distributed Processing and Applications
Modified composite Banyan network with an enhanced terminal reliability
Computer Communications
| Hi-index | 14.98 |
The Gamma network is an interconnection network connecting N = 2n inputs to N outputs. It is a multistage network with N switches per stage, each of which is a 3 input, 3 output crossbar. The stages are linked via "power of two" and identify connections in such a way that redundant paths exist between the input and output terminals. In this network, a path from a source to a destination may be represented using one of the redundant forms of the difference between the source and destination numbers. The redundancy in paths may thus be studied using the theory of redundant number systems. Results are obtained on the distribution of paths connecting inputs and outputs, and the permuting capabilities of the Gamma network. Frequently used permutations and control mechanisms are discussed briefly. We also perform a detailed terminal reliability analysis of the Gamma network, deriving expressions for the reliability between an input and output terminal.