Design and analysis of reliable interconnection networks
Design and analysis of reliable interconnection networks
Fault tolerance of beta-networks in interconnected multicomputer systems
Fault tolerance of beta-networks in interconnected multicomputer systems
Graphs and Hypergraphs
Optimal BPC Permutations on a Cube Connected SIMD Computer
IEEE Transactions on Computers
IEEE Transactions on Computers
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems
IEEE Transactions on Computers
Parallel Permutations of Data: A Benes Network Control Algorithm for Frequently Used Permutations
IEEE Transactions on Computers
Graph Theoretical Analysis and Design of Multistage Interconnection Networks
IEEE Transactions on Computers
On a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
Performance of Processor-Memory Interconnections for Multiprocessors
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
Routing Schemes for the Augmented Data Manipulator Network in an MIMD System
IEEE Transactions on Computers
A Class of Redundant Path Multistage Interconnection Networks
IEEE Transactions on Computers
A Survey of Interconnection Networks
Computer
A centrally controlled shuffle network for reconfigurable and fault-tolerant architecture
ACM SIGARCH Computer Architecture News
A Fault-Tolerant Mapping Scheme for a Configurable Multiprocessor System
IEEE Transactions on Computers
On the Number of Permutations Performable by Extra-Stage Multistage Interconnection Networks
IEEE Transactions on Computers
Fault-tolerant routing in MIN-based supercomputers
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
IEEE Transactions on Computers
Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks
IEEE Transactions on Computers
Optimally Routing LC Permutations on k-Extra-Stage Cube-Type Networks
IEEE Transactions on Computers
On Routing Maskable Messages in Hypercube-Derived Multistage Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
Bounds on the Performance of Message Routing Heuristics
IEEE Transactions on Computers
An Optimal Algorithm for Permutation Admissibility to Multistage Interconnection Networks
IEEE Transactions on Computers
Optimal Realization of Any BPC Permutation on K-Extra-Stage Omega Networks
IEEE Transactions on Computers
An Optimal O(NlgN) Algorithm for Permutation Admissibility to Extra-Stage Cube-Type Networks
IEEE Transactions on Computers
Reconfiguration with Time Division Multiplexed MIN's for Multiprocessor Communications
IEEE Transactions on Parallel and Distributed Systems
Partitioning Message Patterns for Bundled Omega Networks
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Permutation routing in optical MIN with minimum number of stages
Journal of Systems Architecture: the EUROMICRO Journal
More on rearrangeability of combined (2n - 1)-stage networks
Journal of Systems Architecture: the EUROMICRO Journal
Modified composite Banyan network with an enhanced terminal reliability
Computer Communications
Graph theoretic characterization and reliability of the multiple-clique network
Mathematical and Computer Modelling: An International Journal
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In this paper, we study fault-tolerant multiprocessor systems employing redundant-path multistage interconnection networks. Such systems permit interprocessor communication in the presence of faulty components in the network. The interconnection network considered is a delta network augmented with an extra switching stage in front. When the first and last stages are fault-free, the extra-stage delta networks continue to provide full access in the presence of all single and many multiple faults in switching elements of the intermediate stages. In this paper, we use graph-theoretic techniques to study the problem of routing permutations in extra-stage delta networks when faults are present in the network. We first formulate the problem of performing an arbitrary permutation on the fault-free network as a vertex-coloring problem and later extend this to networks with noncritical faults. Although the general problem of realizing a permutation in the minimum number of passes is intractable, classes of permutations with some regularity can be routed optimally. To illustrate the idea, we consider the class of BPC (bit permute-complement) permutations: algorithms for performing arbitrary permutations in this class on the extra-stage delta network are given, both for the fault-free network and for a network with noncritical faults.