Journal of the ACM (JACM)
An Adaptation of the Fast Fourier Transform for Parallel Processing
Journal of the ACM (JACM)
Array Permutation by Index-Digit Permutation
Journal of the ACM (JACM)
Associative and Parallel Processors
ACM Computing Surveys (CSUR)
Theoretical limitations on the use of parallel memories.
Theoretical limitations on the use of parallel memories.
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network
IEEE Transactions on Computers
Implementation of Permutation Functions in Illiac IV-Type Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
ILLIAC IV Software and Application Programming
IEEE Transactions on Computers
Fast Random and Sequential Access to Dynamic Memories of Any Size
IEEE Transactions on Computers
Interconnections for Parallel Memories to Unscramble p-Ordered Vectors
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
Dynamic Memories with Fast Random and Sequential Access
IEEE Transactions on Computers
The Organization and Use of Parallel Memories
IEEE Transactions on Computers
Sorting networks and their applications
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
Programmable indexing networks
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
STARAN parallel processor system hardware
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
A Shuffle-Exchange Network with Simplified Control
IEEE Transactions on Computers
Fault-Tolerant Multiprocessors with Redundant-Path Interconnection Networks
IEEE Transactions on Computers - The MIT Press scientific computation series
Permutations on Illiac IV-Type Networks
IEEE Transactions on Computers
A new interconnection network for SIMD computers: the sigma networks
IEEE Transactions on Computers
A multiprocessor architecture for two-dimensional digital filters
IEEE Transactions on Computers
On the Design of Efficient Multistage Interconnection Networks
MASCOTS '96 Proceedings of the 4th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
A journey into multicomputer routing algorithms
PAS '95 Proceedings of the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis
Efficient Protocols for Permutation Routing on All-Optical Multistage Interconnection Networks
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
An Easily Controlled Network for Frequently Used Permutations
IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
The Universality of the Shuffle-Exchange Network
IEEE Transactions on Computers
A Self-Routing Benes Network and Parallel Permutation Algorithms
IEEE Transactions on Computers
The Reverse-Exchange Interconnection Network
IEEE Transactions on Computers
Interference Analysis of Shuffle/Exchange Networks
IEEE Transactions on Computers
Applications of SIMD computers in signal processing
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
Kronecker products and shuffle algebra
IEEE Transactions on Computers
The topology of cellular partitioning networks
IEEE Transactions on Computers
| Hi-index | 15.02 |
The Benes binary network can realize any one-to-one mapping of its 2ninlets onto its 2noutlets. Several authors have proposed algorithms which compute control patterns for this network from any bijection assignment. However, these algorithms are both time-consuming and space-consuming. In order to meet the time constraints arising from the use of a Benes network as the alignm