The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
The Indirect Binary n-Cube Microprocessor Array
IEEE Transactions on Computers
Parallel Permutations of Data: A Benes Network Control Algorithm for Frequently Used Permutations
IEEE Transactions on Computers
Communication Issues in the Design and Analysis of Parallel Algorithms
IEEE Transactions on Software Engineering
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This paper analyzes in detail how far the proposed Single Instruction Multiple Data (SIMD) computers with interconnection networks are applicable in the signal processing area. Decimation in the time radix-2 fast Fourier transform (FFT) algorithm is considered here for implementation in a multiprocessor system with shared bus and an SIMD computer with interconnection network. Results are derived for data allocation, interprocessor communication, approximate computation time, speedup, and cost effectiveness for an N-point FFT with any P available processors. Further generalization is obtained for a radix-r FFT algorithm. N X N point, two-dimensional discrete Fourier transform (DFT) implementation is also considered, with one or more rows of input matrix allocated to each processor. Various curves are plotted and a comparison in performance is carried out between a shared-bus multiprocessor and SIMD computer with interconnection network. It is shown that the latter gives much higher speedup for P 16 and is more cost-effective even with the high cost of switches. N, P and r, considered here, are all powers of 2.