An efficient routing control for the SIGMA network Σ(4)
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
An optimal routing algorithm for mesh-connected Parallel computers
Journal of the ACM (JACM)
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
Notes on Shuffle/Exchange-Type Switching Networks
IEEE Transactions on Computers
IEEE Transactions on Computers
On the Rearrangeability of 2(Iog2N) -1 Stage Permutation Networks
IEEE Transactions on Computers
The Burroughs Scientific Processor (BSP)
IEEE Transactions on Computers
The Universality of the Shuffle-Exchange Network
IEEE Transactions on Computers
A Self-Routing Benes Network and Parallel Permutation Algorithms
IEEE Transactions on Computers
The Indirect Binary n-Cube Microprocessor Array
IEEE Transactions on Computers
Parallel Permutations of Data: A Benes Network Control Algorithm for Frequently Used Permutations
IEEE Transactions on Computers
Graph Theoretical Analysis and Design of Multistage Interconnection Networks
IEEE Transactions on Computers
The Reverse-Exchange Interconnection Network
IEEE Transactions on Computers
On a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
A Compiler for an Array and Vector Processing Language
IEEE Transactions on Software Engineering
A Survey of Interconnection Networks
Computer
An efficient routing control for the SIGMA network Σ(4)
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Interleaved parallel schemes: improving memory throughput on supercomputers
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Odd memory systems may be quite interesting
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
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When processing vectors on SIMD computers, some data manipulations (rearrangement, expansion, compression, perfect-shuffle, bit-reversal) have to be performed by an interconnection network. When this network lacks an efficient routing control, it becomes the bottleneck for performance. It has been pointed out that general algorithms to control rearrangeable networks for arbitrary permutations are time consuming. To overcome this difficulty, Lenfant [9] proposed a set of permutations covering standard needs associated with efficient control algorithms for the Benes network. But to perform explicit permutations on vectors, several passes through the network are necessary because they have to be composed with transfer rearrangements. We present efficient control algorithms to perform these vector permutations in a single pass on a new interconnection network.