Processor-memory interconnections for multiprocessors
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
An emulator network for SIMD machine interconnection networks
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Study of multistage SIMD interconnection networks
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Banyan networks for partitioning multiprocessor systems
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
Interprocessor connections--capabilities, exploitation and effectiveness.
Interprocessor connections--capabilities, exploitation and effectiveness.
The Gamma network: A multiprocessor interconnection network with redundant paths
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Dynamic rerouting tag schemes for the augmented data manipulator network
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Multiprocessor hardware: An architectural overview
ACM '80 Proceedings of the ACM 1980 annual conference
IEEE Transactions on Computers
The Theory Underlying the Partitioning of Permutation Networks
IEEE Transactions on Computers
PASM: A Partitionable SIMD/MIMD System for Image Processing and Pattern Recognition
IEEE Transactions on Computers
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There have been many multistage interconnection networks proposed in the literature for interconnecting the processors that comprise large parallel processing systems. In this paper, the use of a multistage network in the MIMD mode of operation is considered. A tag based routing scheme is proposed for the Augmented Data Manipulator network. Also included is a rerouting scheme that allows a message blocked by a busy link in its present path to dynamically make use of a non-busy link and continue, when possible. Finally, a tag based broadcasting scheme is introduced that allows one processor to send messages to a power of two other processors.