Computer Organization and Architecture
Computer Organization and Architecture
Compiler Construction for Digital Computers
Compiler Construction for Digital Computers
MIMD machine communication using the augmented data manipulator network
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
Processor-memory interconnections for multiprocessors
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Study of multistage SIMD interconnection networks
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
A hierarchical, restructurable multi-microprocessor architecture
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
CFD — A FORTRAN-like language for the ILLIAC IV
Proceedings of the conference on Programming languages and compilers for parallel and vector machines
A large scale, homogeneous, fully distributed parallel machine, I
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Microprocessor implementation of a parallel processor
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Data Manipulating Functions in Parallel Processors and Their Implementations
IEEE Transactions on Computers
The Indirect Binary n-Cube Microprocessor Array
IEEE Transactions on Computers
Parallel Algorithms for Joining Two Points by a Straight-Line Segment
IEEE Transactions on Computers
The Theory Underlying the Partitioning of Permutation Networks
IEEE Transactions on Computers
IEEE Transactions on Computers
A Multicomputer System with Dynamic Architecture
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
A Parallel Picture Processing Machine
IEEE Transactions on Computers
A Model of SIMD Machines and a Comparison of Various Interconnection Networks
IEEE Transactions on Computers
A Parallel Processor Operating System Comparison
IEEE Transactions on Software Engineering
TRANQUIL: a language for an array processing computer
AFIPS '69 (Spring) Proceedings of the May 14-16, 1969, spring joint computer conference
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
Cm*: a modular, multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
The implementation of the Cm* multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
STARAN parallel processor system hardware
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
Determining an Optimal Secondary Storage Service Rate for the PASM Control System
IEEE Transactions on Computers
A Characterization and Analysis of Parallel Processor Interconnection Networks
IEEE Transactions on Computers
Flexible language constructs for large parallel programs
Scientific Programming
Performance Evaluation of Heuristics for Scheduling Pipelined Multiprocessor Tasks
ICCS '01 Proceedings of the International Conference on Computational Sciences-Part I
VECPAR '00 Selected Papers and Invited Talks from the 4th International Conference on Vector and Parallel Processing
A state-of-the-art SIMD two-dimensional FFT array processor
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Parallel Processing Approaches to Image Correlation
IEEE Transactions on Computers
On the Number of Permutations Performable by the Augmented Data Manipulator Network
IEEE Transactions on Computers
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems
IEEE Transactions on Computers
Task Preloading Schemes for Reconfigurable Parallel Processing Systems
IEEE Transactions on Computers
Star: A Local Network System for Real-Time Management of Imagery Data
IEEE Transactions on Computers
IEEE Transactions on Computers
A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic Scene Analysis
IEEE Transactions on Computers
PUMPS Architecture for Pattern Analysis and Image Database Management
IEEE Transactions on Computers
Routing Schemes for the Augmented Data Manipulator Network in an MIMD System
IEEE Transactions on Computers
NON-VON's applicability to three AI task area
IJCAI'85 Proceedings of the 9th international joint conference on Artificial intelligence - Volume 1
Performance of local search heuristics on scheduling a class of pipelined multiprocessor tasks
Computers and Electrical Engineering
Design and implementation of 812: A declarative data-parallel language
Computer Languages
ACM SIGARCH Computer Architecture News
| Hi-index | 15.02 |
PASM, a large-scale multimicroprocessor system being designed at Purdue University for image processing and pattern recognition, is described. This system can be dynamically reconfigured to operate as one or more independent SIMD and/or MIMD machines. PASM consists of a parallel computation unit, which contains N processors, N memories, and an interconnection network; Q microcontrollers, each of which controls N/Q processors; N/Q parallel secondary storage devices; a distributed memory management system; and a system control unit, to coordinate the other system components. Possible values for N and Q are 1024 and 16, respectively. The control schemes and memory management in PASM are explored. Examples of how PASM can be used to perform image processing tasks are given.