BLISS: a language for systems programming
Communications of the ACM
An analysis of the instruction execution rate in certain computer structures
An analysis of the instruction execution rate in certain computer structures
The Description and Use of Register-Transfer Modules (RTM's)®
IEEE Transactions on Computers
A new architecture for mini-computers: the DEC PDP-11
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
Exact performance estimates for multiprocessor memory and bus interference
IEEE Transactions on Computers
EMMA-an industrial experience on large multiprocessing architectures
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
The simulation of a microprocessor based event set processor
ANSS '81 Proceedings of the 14th annual symposium on Simulation
Experiences with Performance Measurement and Modeling of a Processor Array
IEEE Transactions on Computers
Shared Cache for Multiple-Stream Computer Systems
IEEE Transactions on Computers
IEEE Transactions on Computers
Dense Trivalent Graphs for Processor Interconnection
IEEE Transactions on Computers
Markov Models for Multiple Bus Multiprocessor Systems
IEEE Transactions on Computers
VLSI Performance Comparison of Banyan and Crossbar Communications Networks
IEEE Transactions on Computers
IEEE Transactions on Computers
Generalized Hypercube and Hyperbus Structures for a Computer Network
IEEE Transactions on Computers
The Piecewise Data Flow Architecture: Architectural Concepts
IEEE Transactions on Computers
Some Performance Issues in Multiprocessor System Design
IEEE Transactions on Computers
Memory and Bus Conflict in an Array Processor
IEEE Transactions on Computers
Graph Theoretical Analysis and Design of Multistage Interconnection Networks
IEEE Transactions on Computers
Interconnection Networks from Three State Cells
IEEE Transactions on Computers
Analysis of Memory Interference in Multiprocessors
IEEE Transactions on Computers
Reduction of Connections for Multibus Organization
IEEE Transactions on Computers
Multiple-Read Single-Write Memory and Its Applications
IEEE Transactions on Computers
A General Model for Memory Interference in Multiprocessors
IEEE Transactions on Computers
The ETH-Multiprocessor Empress: A Dynamically Configurable MIMD System
IEEE Transactions on Computers
Memory Interference in Synchronous Multiprocessor Systems
IEEE Transactions on Computers
Modeling Unusual Behavior of Parallel Algorithms
IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
Comparative Performance Analysis of Single Bus Multiprocessor Architectures
IEEE Transactions on Computers
Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors
IEEE Transactions on Computers
PASM: A Partitionable SIMD/MIMD System for Image Processing and Pattern Recognition
IEEE Transactions on Computers
Design and Performance of Generalized Interconnection Networks
IEEE Transactions on Computers
C.ai: a computer architecture for AI research
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
Decomposition of data flow graphs on multiprocessors
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Cm*: a modular, multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
A new minicomputer/multiprocessor for the ARPA network
AFIPS '73 Proceedings of the June 4-8, 1973, national computer conference and exposition
AFIPS '76 Proceedings of the June 7-10, 1976, national computer conference and exposition
Interconnection networks: a survey and assessment
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
Research in data security: policies and projects
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
Modular crossbar switch for large-scale multiprocessor systems: structure and implementation
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
An operating system kernel mechanism for the poly-processor system PPS-R
AFIPS '80 Proceedings of the May 19-22, 1980, national computer conference
An overview of the Texas reconfigurable array computer
AFIPS '80 Proceedings of the May 19-22, 1980, national computer conference
Distributed scheduling of resources on interconnection networks
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
IJCAI'73 Proceedings of the 3rd international joint conference on Artificial intelligence
Representation and efficiency in a production system for speech understanding
IJCAI'79 Proceedings of the 6th international joint conference on Artificial intelligence - Volume 1
Yes, an SIMD machine can be used for AI
IJCAI'85 Proceedings of the 9th international joint conference on Artificial intelligence - Volume 1
A Comparative Study of Distributed Resource Sharing on Multiprocessors
IEEE Transactions on Computers
On a varistructured array of microprocessors
IEEE Transactions on Computers - Special issue on parallel processors and processing
| Hi-index | 0.08 |
In the Summer of 1971 a project was initiated at CMU to design the hardware and software for a multi-processor computer system using minicomputer processors (i.e., PDP-11's). This paper briefly describes an overview (only) of the goals, design, and status of this hardware/software complex, and indicates some of the research problems raised and analytic problems solved in the course of its construction.