ACM Computing Surveys (CSUR)
Computer Interconnection Structures: Taxonomy, Characteristics, and Examples
ACM Computing Surveys (CSUR)
Operating system principles
Computer Modules: An architecture for large digital modules
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
Computer structures: Readings and examples (McGraw-Hill computer science series)
Computer structures: Readings and examples (McGraw-Hill computer science series)
The Description and Use of Register-Transfer Modules (RTM's)®
IEEE Transactions on Computers
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
The implementation of the Cm* multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Software management of Cm*: a distributed multiprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
A new minicomputer/multiprocessor for the ARPA network
AFIPS '73 Proceedings of the June 4-8, 1973, national computer conference and exposition
The Architecture of SM3: A Dynamically Partitionable Multicomputer System
IEEE Transactions on Computers
A language implementation design for a multiprocessor computer system
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Experiences with Performance Measurement and Modeling of a Processor Array
IEEE Transactions on Computers
Design and Evaluation of a Fault-Tolerant Multiprocessor Using Hardware Recovery Blocks
IEEE Transactions on Computers
Modular Minicomputers Using Microprocessors
IEEE Transactions on Computers
IEEE Transactions on Computers
The NYU Ultracomputer Designing an MIMD Shared Memory Parallel Computer
IEEE Transactions on Computers
IEEE Transactions on Computers
Asynchronous and Clocked Control Structures for VSLI Based Interconnection Networks
IEEE Transactions on Computers
A Cluster Structure as an Interconnection Network for Large Multimicrocomputer Systems
IEEE Transactions on Computers
Experience with Multiprocessor Algorithms
IEEE Transactions on Computers
The Piecewise Data Flow Architecture: Architectural Concepts
IEEE Transactions on Computers
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems
IEEE Transactions on Computers
MP/C: A Multiprocessor/Computer Architecture
IEEE Transactions on Computers
Derivation and Calibration of a Transient Error Reliability Model
IEEE Transactions on Computers
Wave Scheduling Decentralized Scheduling of Task Forces in Multicomputers
IEEE Transactions on Computers
Reduction of Connections for Multibus Organization
IEEE Transactions on Computers
Automatic Generation of Symbolic Reliability Functions for Processor-Memory-Switch Structures
IEEE Transactions on Computers - Lecture notes in computer science Vol. 174
Comparing Serial Computers, Arrays, and Networks Using Measures of "Active Resources"
IEEE Transactions on Computers
The ETH-Multiprocessor Empress: A Dynamically Configurable MIMD System
IEEE Transactions on Computers
Design of HM2p A Hierarchical Multimicroprocessor for General-Purpose Applications
IEEE Transactions on Computers
Pin Limitations and Partitioning of VLSI Interconnection Networks
IEEE Transactions on Computers
Comparative Performance Analysis of Single Bus Multiprocessor Architectures
IEEE Transactions on Computers
Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors
IEEE Transactions on Computers
Hypertree: A Multiprocessor Interconnection Topology
IEEE Transactions on Computers
PASM: A Partitionable SIMD/MIMD System for Image Processing and Pattern Recognition
IEEE Transactions on Computers
The implementation of the Cm* multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Software management of Cm*: a distributed multiprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Software sympathetic chip set design
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Modular crossbar switch for large-scale multiprocessor systems: structure and implementation
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Distributed task force scheduling in multi-microcomputer networks
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Performance comparison of some shared memory organizations for 2D mesh-like NOCs
Microprocessors & Microsystems
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This paper describes the architecture of a new large multi-processor computer system being built at Carnegie-Mellon University. The system allows close cooperation between large numbers of inexpensive processors. All processors share access to a single virtual memory address space. There are no arbitrary limits on the number of processors, amount of memory or communication bandwidth in the system. Considerable support is provided for low level operating system primitives and inter-process communication.