Design of HM2p A Hierarchical Multimicroprocessor for General-Purpose Applications

Authors:
K. G. Shin; Yann-Hang Lee;J. Sasidhar
Affiliations:
Department of Electrical and Computer Engineering, University of Michigan;-;-
Venue:
IEEE Transactions on Computers
Year:
1982

Citing 15
Cited 2

Mean-Value Analysis of Closed Multichain Queuing Networks

Journal of the ACM (JACM)
Multiprocessor Organization—a Survey

ACM Computing Surveys (CSUR)
The UNIX time-sharing system

Communications of the ACM
Capability-based addressing

Communications of the ACM
Monitors: an operating system structuring concept

Communications of the ACM
Hardware support for concurrent programming in loosely coupled multiprocessors

ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Protection in the Hydra Operating System

SOSP '75 Proceedings of the fifth ACM symposium on Operating systems principles
Medusa: An experiment in distributed operating system structure (Summary)

SOSP '79 Proceedings of the seventh ACM symposium on Operating systems principles
Hierarchical multiprocessor organizations

ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Analysis of Memory Interference in Multiprocessors

IEEE Transactions on Computers
Hypertree: A Multiprocessor Interconnection Topology

IEEE Transactions on Computers
Task Allocation in Distributed Data Processing

Computer
Cm*: a modular, multi-microprocessor

AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
The implementation of the Cm* multi-microprocessor

AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Software management of Cm*: a distributed multiprocessor

AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference

Distributed Recovery in Fault-Tolerant Multiprocessor Networks

IEEE Transactions on Computers
Design and Evaluation of a Fault-Tolerant Multiprocessor Using Hardware Recovery Blocks

IEEE Transactions on Computers

Quantified Score

Hi-index	14.99

Visualization

Abstract

This paper presents a tree-structured multiprocessor called the hierarchical multimicroprocessor (HM2p), each node of which is composed of a cluster of processor modules (PM's), common memory, DMA interface, switches, communication lines, and a data processor associated with it. The HM2p consists of two different hierarchies, one for data processing and the other for data distribution, which provide clean, structured separation between processing components and user interface components.