Computer Interconnection Structures: Taxonomy, Characteristics, and Examples
ACM Computing Surveys (CSUR)
Further analysis of a computing center environment
Communications of the ACM
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
The minerva multi-microprocessor
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
A hierarchical, restructurable multi-microprocessor architecture
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
The design of a multi-micro-computer system
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
Some implementations of segment sequential functions
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
A multi-microprocessor computer system architecture
SOSP '75 Proceedings of the fifth ACM symposium on Operating systems principles
DASP: a general-purpose MIMD parallel computer using distributed associative processing
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
Hierarchical Interconnection Networks for Multicomputer Systems
IEEE Transactions on Computers
Anomalies in parallel branch-and-bound algorithms
Communications of the ACM
MANIP-a parallel computer system for implementing branch and bound algorithms
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
An introduction to network computers
ACM '82 Proceedings of the ACM '82 conference
Multiprocessor hardware: An architectural overview
ACM '80 Proceedings of the ACM 1980 annual conference
A Cluster Structure as an Interconnection Network for Large Multimicrocomputer Systems
IEEE Transactions on Computers
Communication Structures for Large Networks of Microcomputers
IEEE Transactions on Computers
Design of HM2p A Hierarchical Multimicroprocessor for General-Purpose Applications
IEEE Transactions on Computers
The architecture of MANIP: a parallel computer system for solving NP-complete problems
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
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The development of LSI components has induced a substantial research effort into the possibility of applying conglomerations of small processors on some computational problems previously limited to large processors. The primary advantages of “multi-microprocessor architectures” are their potential for improvements in cost, reliability, and possibly speed over conventional large computers. However, the realization of these advantages requires improvements in the techniques necessary to translate problems into parallel algorithms for multi-microprocessors, and in the architectures of the multi-microprocessors themselves. This paper describes an architecture currently being investigated at SUNY - Stony Brook. The first section discusses various strategies of design. The second section describes the structure of the proposed system. Finally, the third section discusses some classes of problems for which the architecture is suited.