Communicating sequential processes
Communicating sequential processes
ACM Computing Surveys (CSUR)
An alternative to event queues for synchronization in monitors
Communications of the ACM
Communications of the ACM
Monitors: an operating system structuring concept
Communications of the ACM
Programming semantics for multiprogrammed computations
Communications of the ACM
Hardware support for inter-process communication and processor sharing
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
Error resynchronization in producer-consumer systems
SOSP '75 Proceedings of the fifth ACM symposium on Operating systems principles
Constructing correct and efficient concurrent programs
Proceedings of the international conference on Reliable software
Computer system organization: The B5700/B6700 series (ACM monograph series)
Computer system organization: The B5700/B6700 series (ACM monograph series)
The multics system: an examination of its structure
The multics system: an examination of its structure
A cache-based message passing scheme for a shared-bus multiprocessor
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Design of HM2p A Hierarchical Multimicroprocessor for General-Purpose Applications
IEEE Transactions on Computers
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Various possible implementation schemes for concurrent programming concepts are surveyed. Based upon this examination, computer design features are proposed which assist in the efficient realization of concurrent programming concepts in a multiprocessor machine which is constructed from a number of self-contained processors, each with its own random access memory. It is indicated how the proposed architecture provides hardware support for creating and terminating parallel execution paths. The hardware supports scheduled sharing of resources as its basic design feature. In particular, the problem of implementing scheduled waits in monitors is examined in detail. This is done in an environment where processes distributed among several physical processors are using a common monitor. It is also shown how the practical aspects of error resynchronization can be handled efficiently.