Computer Interconnection Structures: Taxonomy, Characteristics, and Examples
ACM Computing Surveys (CSUR)
Multiprocessor Organization—a Survey
ACM Computing Surveys (CSUR)
Communications of the ACM
Protection in an information processing utility
Communications of the ACM
Fundamental Concepts of Programming Systems
Fundamental Concepts of Programming Systems
Operating system principles
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
A preliminary architecture for a basic data-flow processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
RISC I: A Reduced Instruction Set VLSI Computer
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
X-Tree: A tree structured multi-processor computer architecture
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
The minerva multi-microprocessor
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
Multiprocessor Architectures For Concurrent Programs
ACM '78 Proceedings of the 1978 annual conference
A large scale, homogeneous, fully distributed parallel machine, I
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Architecture of a New Microprocessor
Computer
A Computing Machine Based on Tree Structures
IEEE Transactions on Computers
On the Effective Bandwidth of Parallel Memories
IEEE Transactions on Computers
Cm*: a modular, multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Staged circuit switching for network computers
SIGCOMM '83 Proceedings of the symposium on Communications Architectures & Protocols
Divide-and-Conquer for Parallel Processing
IEEE Transactions on Computers
Throughput of multiprocessors with replicated shared memories
AFIPS '84 Proceedings of the July 9-12, 1984, national computer conference and exposition
Performance evaluation of the MP/C
AFIPS '83 Proceedings of the May 16-19, 1983, national computer conference
Hi-index | 14.98 |
A computer architecture for concurrent computing is proposed which has the shared memory aspect of tightly coupled multiprocessor systems and also the connection simplicity associated with message-connected, loosely-coupled multicomputer systems. A large address space is dynamically partitioned into contiguous segments that can be accessed by a single processor. The partitioning is accomplished by switching the system buses. The completion of a concurrent process is signaled by a processor's return to an idle state and the reattachment of its memory segment to the neighboring active processor. In effect, the assignment of an address sequence and the activation of a processor is a process-fork operation, and the processor deactivation and memory segment reattachment is a process-join. Following a description of the MP/C structure and operation, programming conventions are explained and demonstrated. Applications include tree-structured multiprocessing, recursive and nondeterministic procedures, very high precision numerical calculations, process-structured operating systems, and others. The linear MP/C structure is extensible to higher dimensions. A two-dimensional system is described and its application is discussed. Finally, performance issues are presented, and the MP/C architecture is compared with related designs.