Experience Using Multiprocessor Systems—A Status Report
ACM Computing Surveys (CSUR)
The NYU Ultracomputer—designing a MIMD, shared-memory parallel machine (Extended Abstract)
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
A control processor for a reconfigurable array computer
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
A multi-microprocessor architecture with hardware support for communication and scheduling
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
A multiple stream microprocessor prototype system: AMP-1
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
The MuNet: A scalable decentralized architecture for parallel computation
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
The Apiary network architecture for knowledgeable systems
LFP '80 Proceedings of the 1980 ACM conference on LISP and functional programming
Overview of the Hydra Operating System development
SOSP '75 Proceedings of the fifth ACM symposium on Operating systems principles
Distributed communication via global buffer
PODC '82 Proceedings of the first ACM SIGACT-SIGOPS symposium on Principles of distributed computing
An integrated microcomputer network for experiments in distributed programming
An integrated microcomputer network for experiments in distributed programming
MP/C: A Multiprocessor/Computer Architecture
IEEE Transactions on Computers
An Optimal Shortest-Path Routing Policy for Network Computers with Regular Mesh-Connected Topologies
IEEE Transactions on Computers
Research note: Analysis of 1-ROR networks
Computer Communications
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Staged circuit switching (SCS) is a message-switching technique that combines a new protocol with new communication hardware. Protocol and hardware are designed specifically for networks that are intended to function as integrated, general-purpose MIMD machines, i.e. for "network computers". The SCS protocol is a form of circuit switching that degrades automatically into packet switching when unavailable output lines make further extension of a partial circuit impossible. The SCS hardware uses a front-end crossbar switch to multipex some small number of communication channels among all of a given node's incident links. Together, hardware and protocol represent an attempt to convert spare bandwidth into lower network delays. They also allow experimentation with networks that reconfigure themselves dynamically in response to measured traffic patterns. We compare SCS to packet switching, circuit switching and the "virtual cut-through" protocol of Kermani and Kleinrock, and discuss an SCS implementation designed for the SBN network computer.