A multi-microprocessor architecture with hardware support for communication and scheduling

  • Authors:
  • Sudhir R. Ahuja;Abhaya Asthana

  • Affiliations:
  • Bell Laboratories, Holmdel, New Jersey;Bell Laboratories, Holmdel, New Jersey

  • Venue:
  • ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
  • Year:
  • 1982

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Abstract

We describe a multiprocessor system that attempts to enhance the system performance by incorporating into its architecture a number of key operating system concepts. In particular: — the scheduling and synchronization of concurrent activities are built in at the hardware level, — the interprocess communication functions are performed in hardware, and, — a coupling between the scheduling and communication functions is provided which allows efficient implementation of parallel systems that is precluded when the scheduling and communication functions are realized in software.