ACM Computing Surveys (CSUR)
Dynamic storage allocation systems
Communications of the ACM
Compact finite difference schemes for ocean models: 1. Ocean waves
Journal of Computational Physics
A modular computer sharing systems
Communications of the ACM
Computer Structures: Principles and Examples
Computer Structures: Principles and Examples
Computer Interconnection Structures: Taxonomy, Characteristics, and Examples
ACM Computing Surveys (CSUR)
MPACT: microprocessor application to control-firmware translator
ACM SIGDA Newsletter
Conjoined computer systems: an architecture for laboratory data processing and instrument control
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
A distributed function computer for real-time control
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
A multimicroprocessor approach to numerical analysis: An application to gaming problems
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
Emulation of computer networks by microprogrammable microcomputers
MICRO 7 Conference record of the 7th annual workshop on Microprogramming
Modularity and multi-microprocessor structures
MICRO 7 Conference record of the 7th annual workshop on Microprogramming
Multiprocessor hardware: An architectural overview
ACM '80 Proceedings of the ACM 1980 annual conference
Computer modules - an architecture for a modular multi-microprocessor
ACM '75 Proceedings of the 1975 annual conference
IEEE Transactions on Computers
Cm*: a modular, multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Coupling small computers for performance enhancement
AFIPS '76 Proceedings of the June 7-10, 1976, national computer conference and exposition
| Hi-index | 0.00 |
This paper describes the architecture of Computer Modules, or CMs. They are large digital modules of about minicomputer complexity that are specifically designed to take advantage of the rapidly advancing semiconductor technology. These modules are intended to be interconnected into systems that implement a wide range of computational structures. The main features of a CM include a small processor as the primary control element and memory distributed among the CMs in the system rather than centralized into memory modules as in current multiprocessors. CMs are interconnected into a network via buses that each have their own virtual address space to facilitate efficient inter-module memory sharing. This paper includes an ISP description of the address translation mechanisms as well as a discussion of several important implementation issues such as the avoidance of deadlocks in CM networks and the width of the inter-CM buses.