X-Tree: A tree structured multi-processor computer architecture
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
An experimental distributed switching system to handle bursty computer traffic
Proceedings of the first ACM symposium on Problems in the optimization of data communications systems
The design and applications of a computer architecture utilizing a single control processor and an expandable number of distributed network processors.
The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSI
IEEE Transactions on Computers
A Cluster Structure as an Interconnection Network for Large Multimicrocomputer Systems
IEEE Transactions on Computers
A new architecture for mini-computers: the DEC PDP-11
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
Cm*: a modular, multi-microprocessor
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Pluribus: a reliable multiprocessor
AFIPS '75 Proceedings of the May 19-22, 1975, national computer conference and exposition
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A message oriented interprocessor communication network is proposed that utilizes a simple fixed algorithm to store-and-forward short messages over directed data lines. The modular design of the network permits message transmission along a variable number of processors. Simulations of the network's performance indicate that for appropriate message loads the network transmits messages in time proportional to the square root of the number of processors served.