Interference in multiprocessor computer systems with interleaved memory
Communications of the ACM
An analysis of the instruction execution rate in certain computer structures
An analysis of the instruction execution rate in certain computer structures
Analysis of Multiprocessors with Private Cache Memories
IEEE Transactions on Computers
On the Effective Bandwidth of Parallel Memories
IEEE Transactions on Computers
Analysis of Memory Interference in Multiprocessors
IEEE Transactions on Computers
Interleaved Memory Bandwidth in a Model of a Multiprocessor Computer System
IEEE Transactions on Computers
Performance of Processor-Memory Interconnections for Multiprocessors
IEEE Transactions on Computers
A General Model for Memory Interference in Multiprocessors
IEEE Transactions on Computers
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
On the Bandwidth and Interference in Interleaved Memory Systems
IEEE Transactions on Computers
Effects of storage contention on system performance
IBM Systems Journal
Exact performance estimates for multiprocessor memory and bus interference
IEEE Transactions on Computers
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Approximate Models of Multiple Bus Multiprocessor Systems
IEEE Transactions on Computers
A Closed-Form Solution for the Perfornance Analysis of Multiple-Bus Multiprocessor Systems
IEEE Transactions on Computers
Memory Interference Models with Variable Connection Time
IEEE Transactions on Computers
A combinatorial approach to performance analysis of a shared-memory multiprocessor
COCOON'99 Proceedings of the 5th annual international conference on Computing and combinatorics
Interconnection network front-end controller combining to reduce hot spots effects
Computer Communications
| Hi-index | 14.99 |
Synchronous N-processor systems with M shared memories are considered. Memory interference is modeled for processor request rates between 0 and 1 per memory cycle. Two probability-based models and one queueing-based model are summarized from prior literature. A new steady-state flow model is introduced. This steady-state model is most accurate overall. The queueing model is somewhat more accurate when request rate is near 1, and M and N are large. Accuracy is established with respect to probabilistic simulation. Additional related models are described.