On the Bandwidth and Interference in Interleaved Memory Systems

Authors:
C. V. Ravi
Affiliations:
Department of Electrical Engineering and Computer Science, University of California, Berkeley, Calif. 94720.
Venue:
IEEE Transactions on Computers
Year:
1972

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Abstract

A model to estimate the bandwidth and interference in an interleaved memory system in a multiprocessor system is described. The model allows queuing on busy modules, and the results obtained show that previous results are rather pessimistic.