Derivation of a Waiting-Time Factor for a Multiple-Bank Memory
Journal of the ACM (JACM)
A Combinatorial Problem Related to Interleaved Memory Systems
Journal of the ACM (JACM)
ACM Computing Surveys (CSUR)
Multiprocessor memory organization and memory interference
Communications of the ACM
Interference in multiprocessor computer systems with interleaved memory
Communications of the ACM
Anaysis of interleaved memory systems using blockage buffers
Communications of the ACM
An analysis of the instruction execution rate in certain computer structures
An analysis of the instruction execution rate in certain computer structures
A systematic approach to the management of data on distributed data bases
A systematic approach to the management of data on distributed data bases
On the Effective Bandwidth of Parallel Memories
IEEE Transactions on Computers
Memory and Bus Conflict in an Array Processor
IEEE Transactions on Computers
Analysis of Memory Interference in Multiprocessors
IEEE Transactions on Computers
Activity in an Interleaved Memory
IEEE Transactions on Computers
Determination of Priority in Associative Memories
IEEE Transactions on Computers
A Design of a Fast Cellular Associative Memory for Ordered Retrieval
IEEE Transactions on Computers
A General Model for Memory Interference in Multiprocessors
IEEE Transactions on Computers
On the Performance of Certain Multiprocessor Computer Organizations
IEEE Transactions on Computers
On the Performance of Interleaved Memories with Multiple-Word Bandwidths
IEEE Transactions on Computers
A study of interleaved memory systems
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
On the Bandwidth and Interference in Interleaved Memory Systems
IEEE Transactions on Computers
The IBM system/360 model 91: machine philosophy and instruction-handling
IBM Journal of Research and Development
An efficient algorithm for exploiting multiple arithmetic units
IBM Journal of Research and Development
The IBM system/360 model 91: storage system
IBM Journal of Research and Development
Effects of storage contention on system performance
IBM Systems Journal
Vector Computer Memory Bank Contention
IEEE Transactions on Computers
Hi-index | 14.98 |
In this paper an optimal algorithm for scheduling requests on interleaved memories is presented. With this algorithm the average completion time for servicing a finite set of randomly generated requests is proved to be minimum. Performance of this algorithm for nonrandom requests has not been proved. However, it is compared with alternate algorithms using simulations. A pipelined processor is used as an example for the generation of nonrandom requests to the memories. Nonetheless, the source could have been a vector processor or a multiprocessor system. Two alternative organizations are investigated, one with a common set of fixed size buffers to store conflicting requests and one with individual fixed size buffers for each module. These two organizations are shown to be equivalent as far as the average utilization and waiting cycles are concerned. An intelligent scheduler determines the order of initiation of the memory modules. An alternative design with separate instruction and data modules is investigated. It is found that separation gains very little in performance because of the unequal rates of access to the instruction and the data modules. The basic assumptions for the analysis are that the dependency effects are ignored and the request rate is very high so that any empty buffers can be filled immediately. The degradation in memory utilization due to dependency effects is studied in a separate paper in this issue.