Event manipulation for discrete simulations requiring large numbers of events
Communications of the ACM
An efficient data structure for the simulation event set
Communications of the ACM
A proto-language for computer simulation
ANSS '78 Proceedings of the 11th annual symposium on Simulation
A taxonomy and analysis of event set management algorithms for discrete event simulation
ANSS '79 Proceedings of the 12th annual symposium on Simulation
Electronic funds transfer networks: The impact of performance and security considerations
ANSS '80 Proceedings of the 13th annual symposium on Simulation
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
A literature survey on distributed discrete event simulation
ACM SIGSIM Simulation Digest
Complexity of simulation models: a graph theoretic approach
WSC '93 Proceedings of the 25th conference on Winter simulation
The design of a multi-microprocessor based simulation computer - I
ANSS '82 Proceedings of the 15th annual symposium on Simulation
The design of a multi-microprocessor based simulation computer - II
ANSS '83 Proceedings of the 16th annual symposium on Simulation
Event list management - a tutorial
WSC '83 Proceedings of the 15th conference on Winter Simulation - Volume 2
The simulation of a pipelined event set processor
WSC '81 Proceedings of the 13th conference on Winter simulation - Volume 2
The design of a multi-microprocessor based simulation computer - III
ANSS '84 Proceedings of the 17th annual symposium on Simulation
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The availability of inexpensive, sophisticated microprocessors affords the computer system designer great flexibility in assigning simulation processes to independent computing elements. In this paper, the feasibility of assigning the functions of event set manipulation to a separate microprocessing element is investigated. Analysis of a large simulation program was performed to determine the relative amount of computer time required for event set processing, and the pattern of activation sequences for the event set processor. A simulation model was constructed to contrast the performance of a stand-alone computer system with that of a system using the same central processor and an independent event set processor. Parameters which were varied are processor and program loading relative processor speeds, and parameters to the event set algorithms. Performance results and a suggestion for the organization of a microprocessor based discrete event simulation computer are presented.