An Adaptation of the Fast Fourier Transform for Parallel Processing
Journal of the ACM (JACM)
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
IEEE Transactions on Computers
A study of the data commutation problems in a self-repairable multiprocessor
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
Determining an Optimal Secondary Storage Service Rate for the PASM Control System
IEEE Transactions on Computers
Performance of unbuffered shuffle-exchange networks
IEEE Transactions on Computers - The MIT Press scientific computation series
A connecting network with fault tolerance capabilities
IEEE Transactions on Computers - The MIT Press scientific computation series
A Combinatorial Problem Concerning Processor Interconnection Networks
IEEE Transactions on Computers
Parallel Processing Approaches to Image Correlation
IEEE Transactions on Computers
On the Number of Permutations Performable by the Augmented Data Manipulator Network
IEEE Transactions on Computers
IEEE Transactions on Computers
The Prime Memory System for Array Access
IEEE Transactions on Computers
The Universality of the Shuffle-Exchange Network
IEEE Transactions on Computers
Graph Theoretical Analysis and Design of Multistage Interconnection Networks
IEEE Transactions on Computers
A Uniform Representation of Single-and Multistage Interconnection Networks Used in SIMD Machines
IEEE Transactions on Computers
The Theory Underlying the Partitioning of Permutation Networks
IEEE Transactions on Computers
The Reverse-Exchange Interconnection Network
IEEE Transactions on Computers
A Design of a Fast Cellular Associative Memory for Ordered Retrieval
IEEE Transactions on Computers
On a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
Fault-Diagnosis for a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
Routing Schemes for the Augmented Data Manipulator Network in an MIMD System
IEEE Transactions on Computers
Hypertree: A Multiprocessor Interconnection Topology
IEEE Transactions on Computers
PASM: A Partitionable SIMD/MIMD System for Image Processing and Pattern Recognition
IEEE Transactions on Computers
A Class of Redundant Path Multistage Interconnection Networks
IEEE Transactions on Computers
General-purpose integrated indexing circuits: a proposal
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
The architecture of MANIP: a parallel computer system for solving NP-complete problems
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Design and implementation of the banyan interconnection network in TRAC
AFIPS '80 Proceedings of the May 19-22, 1980, national computer conference
Distributed scheduling of resources on interconnection networks
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
Shuffling with the Illiac and PM2I SIMD Networks
IEEE Transactions on Computers
A Comparative Study of Distributed Resource Sharing on Multiprocessors
IEEE Transactions on Computers
A Classification of Cube-Connected Networks with a Simple Control Scheme
IEEE Transactions on Computers
A theory of decomposition into prime factors of layered interconnection networks
Discrete Applied Mathematics
IEEE Transactions on Computers - Special issue on parallel processors and processing
The multidimensional access memory in STARAN
IEEE Transactions on Computers - Special issue on parallel processors and processing
Hi-index | 15.04 |
This paper shows that there exists a class of functions called data manipulating functions (DMF's), in sequential as well as paralel processors. The circuits used to achieve these functions can be considered to form an independent functional block, called a data manipulator. A basic organization applicable to both sequential and parallel processors is then suggested. The main deviation of a parallel processor orgaization from the conventional Von Neumann organization is seen to be in the bit-slice (bis) manipulating functions. A comprehensive set of bis manipulating functions from the categories of permuting, replicating, spacing and masking is given. Implementation of the last category, the masking functions, is usually through a mask register by defining its content (mask pattern). It is found that for many operations the required mask patterns are periodic and/or monotonic. The upper bounds of generating these patterns are found. The techniques and designs of two data manipulators for the first three categories of DMF's (permuting, replicating, spacing) are given. Periodic and monotonic mask patterns are also used to help in implementing some of these functions. In addition, it is shown that the data manipulator designs presented in this paper are extremely flexible to suit the requirements of various parallel processors.