Interconnection networks for large-scale parallel processing: theory and case studies (2nd ed.)
Interconnection networks for large-scale parallel processing: theory and case studies (2nd ed.)
The B-Network: A Multistage Interconnection Network with Backward Links
IEEE Transactions on Computers
Destination Tag Routing Techniques Based on a State Model for the IADM Network
IEEE Transactions on Computers
CGIN: A Fault Tolerant Modified Gamma Interconnection Network
IEEE Transactions on Parallel and Distributed Systems
Throughput Analysis of B-Networks
IEEE Transactions on Computers
Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
IEEE Transactions on Parallel and Distributed Systems
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
Designing A Disjoint Paths Interconnection Network with Fault Tolerance and Collision Solving
The Journal of Supercomputing
On Path-length and Routing-tag Algorithm for Hybrid Irregular Multi-stage Interconnection Networks
SNPD '07 Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 01
IEEE Transactions on Computers
A Survey of Interconnection Networks
Computer
Journal of Discrete Algorithms
Reliability analysis of multi-path multi-stage interconnection network
ICCOMP'06 Proceedings of the 10th WSEAS international conference on Computers
Analysis of Multi-Sort Algorithm on Multi-Mesh of Trees (MMT) architecture
The Journal of Supercomputing
Stochastic communication for application-specific Networks-on-Chip
The Journal of Supercomputing
The Journal of Supercomputing
Journal of Electrical and Computer Engineering
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Multi-stage Interconnection Networks (MINs) are designed to achieve fault-tolerance and collision solving by providing a set of disjoint paths. Ching-Wen Chen and Chung-Ping Chung had proposed a fault-tolerant network called Combining Switches Multi-stage Interconnection Network (CSMIN) and an inaccurate algorithm that provided two correct disjoint paths only for some source-destination pairs. This paper provides a more comprehensive and accurate algorithm that always generate correct routing-tags for two disjoint paths for every source-destination pair in the CSMIN. The 1-fault tolerant CSMIN causes the two disjoint paths to have regular distances at each stage. Moreover, our algorithm backtracks a packet to the previous stage and takes the other disjoint path in the event of a fault or a collision in the network. Furthermore, to eliminate the backtracking penalties of CSMIN, we propose a new design called Fault-tolerant Fully-Chained Combining Switches Multi-stage Interconnection Network (FCSMIN). It has similar characteristics of 1-fault tolerance and two disjoint paths between any source-destination pair, but it can tolerate only one link or switch fault at each stage without backtracking. Our simulation and comparative analysis result shows that FCSMIN has added advantages of destination-tag routing, lower hardware costs, strong reroutability, lower preprocessing overhead, and higher fault-tolerance power in comparison to CSMIN.