The shuffle/exchange-plus networks
ACM-SE 20 Proceedings of the 20th annual Southeast regional conference
Dynamic rerouting tag schemes for the augmented data manipulator network
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Fault tolerance of a class of connecting networks
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
Packet switching in banyan networks
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Study of multistage SIMD interconnection networks
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
A connecting network with fault tolerance capabilities
IEEE Transactions on Computers - The MIT Press scientific computation series
The Kappa Network with Fault-Tolerant Destination Tag Algorithm
IEEE Transactions on Computers
Design and Analysis of Dynamic Redundancy Networks
IEEE Transactions on Computers
Extra group network: a cost-effective fault-tolerant multistage interconnection network
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Destination tag routing techniques based on a state model for the LADM network
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Multistage Interconnection Network Reliability
IEEE Transactions on Computers
Failure Dependent Performance Analysis of a Fault-Tolerant Multistage Interconnection Network
IEEE Transactions on Computers
Destination Tag Routing Techniques Based on a State Model for the IADM Network
IEEE Transactions on Computers
Performance analysis of redundant-path networks for multiprocessor systems
ACM Transactions on Computer Systems (TOCS)
An Analytical Model on the Blocking Probability of a Fault-Tolerant Network
IEEE Transactions on Parallel and Distributed Systems
Design and analysis of fault-tolerant multistage interconnection networks with low link complexity
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Creating Disjoint Paths in Gamma Interconnection Networks
IEEE Transactions on Computers
3-disjoint gamma interconnection networks
Journal of Systems and Software
A Fault-Tolerant Rearrangeable Permutation Network
IEEE Transactions on Computers
Designing A Disjoint Paths Interconnection Network with Fault Tolerance and Collision Solving
The Journal of Supercomputing
IEEE Transactions on Computers
ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
ISPA'04 Proceedings of the Second international conference on Parallel and Distributed Processing and Applications
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The Inverse Augmented Data Manipulator (IADM) is a multistage interconnection network based on the Augmented Data Manipulator (ADM) and Feng's data manipulator. It is designed to be used in large-scale parallel/distributed processing systems for communication among processors, memories, and other system devices. Two aspects of IADM network design are discussed: performance and fault tolerance. A single stage look-ahead scheme for predicting blockage is presented to enhance performance. Next, one method of adding some links to the network to enable it to tolerate one link failure is described. Finally, a different method of adding links is shown that both improves performance and allows the network to tolerate two switching element or two link failures. Included is a new routing tag scheme that accommodates the new links.