Interconnection networks for large-scale parallel processing: theory and case studies
Interconnection networks for large-scale parallel processing: theory and case studies
Fault location techniques for distributed control interconnection networks
IEEE Transactions on Computers
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
A fault-tolerant scheme for multistage interconnection networks
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Design and analysis of fault-tolerant multistage interconnection networks with low link complexity
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Building blocks for data flow prototypes
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
Fault tolerance of a class of connecting networks
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
Banyan networks for partitioning multiprocessor systems
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
Destination Tag Routing Techniques Based on a State Model for the IADM Network
IEEE Transactions on Computers
CSC '93 Proceedings of the 1993 ACM conference on Computer science
A Distributed Management Scheme for Partitionable Parallel Computers
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Network-Wide Rollback Scheme for Fast Recovery from Operator Errors Toward Dependable Network
APNOMS '08 Proceedings of the 11th Asia-Pacific Symposium on Network Operations and Management: Challenges for Next Generation Network Operations and Service Management
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The dynamic redundancy (DR) network is investigated in relation to fault-tolerant design for multistage interconnection network (MIN) based systems. The DR network can tolerate faults in the network and support a system to tolerate processing element (PE) faults without degradation by adding spare PEs, while retaining the full capability of a multistage cube network. A variation of the DR network, the reduced DR network, is also considered, that can be implemented more cost effectively than the DR while retaining most of the advantages of the DR. The reliabilities of DR-based systems with one spare PE and the reliabilities of systems with no spare PEs are estimated and compared, and the effect of adding multiple spare PEs is analyzed