Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Study of multistage SIMD interconnection networks
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Modified composite Banyan network with an enhanced terminal reliability
Computer Communications
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The Gamma interconnection network (GIN) is composed of 3*3 basic building blocks, with interconnecting patterns between stages following the plus-minus-2/sup i/ functions. The authors consider modifications to the GIN by altering the interconnecting patterns between stages so as to achieve high terminal reliability between any source-destination pair, resulting in the reliable GIN (REGIN). A type of REGIN's ensures totally disjoint paths in existence from any source to any destination, thereby capable of tolerating an arbitrary single fault. If several building blocks (i.e., 3*3 switches) are fabricated in one chip with very large scale integrated (VLSI) technology, the layout area and the pin count are less for the REGIN than for its GIN counterpart as a result of the change in the interconnecting patterns, giving rise to potential cost reduction. The terminal reliability of the REGIN is derived and compared with that of a compatible GIN. In addition, the performance of the REGIN is evaluated using simulation.