Fundamentals of Digital Signal Processing with Cdrom
Fundamentals of Digital Signal Processing with Cdrom
SODA: A Low-power Architecture For Software Radio
Proceedings of the 33rd annual international symposium on Computer Architecture
An experimental study of network performance impact of increased latency in software defined radios
Proceedings of the second ACM international workshop on Wireless network testbeds, experimental evaluation and characterization
SAM: enabling practical spatial multiple access in wireless LAN
Proceedings of the 15th annual international conference on Mobile computing and networking
Corey: an operating system for many cores
OSDI'08 Proceedings of the 8th USENIX conference on Operating systems design and implementation
IEEE Communications Magazine
Dynamic Reconfiguration Technologies Based on FPGA in Software Defined Radio System
Journal of Signal Processing Systems
Software defined radio implementation of signaling splitting in hyper-cellular network
Proceedings of the second workshop on Software radio implementation forum
One size hardly fits all: towards context-specific wireless MAC protocol deployment
Proceedings of the 8th ACM international workshop on Wireless network testbeds, experimental evaluation & characterization
Cactus: a hybrid digital-analog wireless video communication system
Proceedings of the 16th ACM international conference on Modeling, analysis & simulation of wireless and mobile systems
Multicore implementation of a fixed-complexity tree-search detector for MIMO communications
The Journal of Supercomputing
Software radio on smartphones: feasible?
Proceedings of the 15th Workshop on Mobile Computing Systems and Applications
CuSora: Real-time software radio using multi-core graphics processing unit
Journal of Systems Architecture: the EUROMICRO Journal
Hi-index | 48.22 |
This paper presents Sora, a fully programmable software radio platform on commodity PC architectures. Sora combines the performance and fidelity of hardware software-defined radio (SDR) platforms with the programmability and flexibility of general-purpose processor (GPP) SDR platforms. Sora uses both hardware and software techniques to address the challenges of using PC architectures for high-speed SDR. The Sora hardware components consist of a radio front-end for reception and transmission, and a radio control board for high-throughput, low-latency data transfer between radio and host memories. Sora makes extensive use of features of contemporary processor architectures to accelerate wireless protocol processing and satisfy protocol timing requirements, including using dedicated CPU cores, large low-latency caches to store lookup tables, and SIMD processor extensions for highly efficient physical layer processing on GPPs. Using the Sora platform, we have developed a few demonstration wireless systems, including SoftWiFi, an 802.11a/b/g implementation that seamlessly interoperates with commercial 802.11 NICs at all modulation rates, and SoftLTE, a 3GPP LTE uplink PHY implementation that supports up to 43.8Mbps data rate.