Power-efficient layered turbo decoder processor
Proceedings of the conference on Design, automation and test in Europe
Wireless Communications: Principles and Practice
Wireless Communications: Principles and Practice
Digital Signal Processing for Multimedia Systems
Digital Signal Processing for Multimedia Systems
WCDMA for UMTS: Radio Access for Third Generation Mobile Communications
WCDMA for UMTS: Radio Access for Third Generation Mobile Communications
ICPP '02 Proceedings of the 2002 International Conference on Parallel Processing
Software Defined Radio: Baseband Technology for 3G Handsets and Basestations
Software Defined Radio: Baseband Technology for 3G Handsets and Basestations
Computer
SODA: A Low-power Architecture For Software Radio
Proceedings of the 33rd annual international symposium on Computer Architecture
Reducing idle mode power in software defined radio terminals
Proceedings of the 2006 international symposium on Low power electronics and design
From SODA to scotch: The evolution of a wireless baseband processor
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Instruction set extensions for software defined radio
Microprocessors & Microsystems
A customized cross-bar for data-shuffling in domain-specific simd processors
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
The next generation challenge for software defined radio
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Domain specific architecture for next generation wireless communication
Proceedings of the Conference on Design, Automation and Test in Europe
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
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Wireless communication is one of the most computationally demanding workloads. It is performed by mobile terminals (“cell phones”) and must be accomplished by a small battery powered system. An important goal of the wireless industry is to develop hardware platforms that can support multiple protocols implemented in software (software defined radio) to support seamless end-user service over a variety of wireless networks. An equally important goal is to provide higher and higher data rates. This paper focuses on a study of the wideband code division multiple access protocol, which is one of the dominant third generation wireless standards. We have chosen it as a representative protocol. We provide a detailed analysis of computation and processing requirements of the core algorithms along with the interactions between the components. The goal of this paper is to describe the computational characteristics of this protocol to the computer architecture community, and to provide a high-level analysis of the architectural implications to illustrate one of the protocols that would need to be accommodated in a programmable platform for software defined radio. The computation demands and power limitations of approximately 60 Gops and 100~300 mW, place extremely challenging goals on such a system. Several of the key features of wideband code division multiple access protocol that can be exploited in the architecture include high degrees of vector and task parallelism, small memory footprints for both data and instructions, limited need for complex arithmetic functions such as multiplication, and a highly variable processing load that provides the opportunity to dynamically scale voltage and frequency.