Digital image processing algorithms
Digital image processing algorithms
VIS Speeds New Media Processing
IEEE Micro
MicroUnity's MediaProcessor Architecture
IEEE Micro
Subword Parallelism with MAX-2
IEEE Micro
Broadband Algorithms with the MicroUnity Mediaprocessor
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
Implementing optimizations at decode time
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Trident: a scalable architecture for scalar, vector, and matrix operations
CRPIT '02 Proceedings of the seventh Asia-Pacific conference on Computer systems architecture
Video compression with parallel processing
Parallel Computing - Parallel computing in image and video processing
Real-time stereo within the VIDET Project
Real-Time Imaging
Accelerating RBF Network Simulation by Using Multimedia Extensions of Modern Microprocessors
ICANN '01 Proceedings of the International Conference on Artificial Neural Networks
FPGA Resource Reduction Through Truncated Multiplication
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Efficient Rijndael Encryption Implementation with Composite Field Arithmetic
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Quantifying behavioral differences between multimedia and general-purpose workloads
Journal of Systems Architecture: the EUROMICRO Journal
Three-dimensional memory vectorization for high bandwidth media memory systems
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Proceedings of the 40th annual Design Automation Conference
Efficient galois field arithmetic on SIMD architectures
Proceedings of the fifteenth annual ACM symposium on Parallel algorithms and architectures
Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements
IEEE Transactions on Computers
Architectural techniques for accelerating subword permutations with repetitions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Vectorizing for a SIMdD DSP architecture
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
The Reconfigurable Streaming Vector Processor (RSVPTM)
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Efficient orchestration of sub-word parallelism in media processors
Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
High-Speed Function Approximation Using a Minimax Quadratic Interpolator
IEEE Transactions on Computers
Matrix register file and extended subwords: two techniques for embedded media processors
Proceedings of the 2nd conference on Computing frontiers
A PC-based real-time stereo vision system
Machine Graphics & Vision International Journal
Contributions to the GNU compiler collection
IBM Systems Journal
Exploiting Vector Parallelism in Software Pipelined Loops
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Optimizing Dynamic Binary Translation for SIMD Instructions
Proceedings of the International Symposium on Code Generation and Optimization
Auto-vectorization of interleaved data for SIMD
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Vector LLVA: a virtual vector instruction set for media processing
Proceedings of the 2nd international conference on Virtual execution environments
SODA: A Low-power Architecture For Software Radio
Proceedings of the 33rd annual international symposium on Computer Architecture
Avoiding conversion and rearrangement overhead in SIMD architectures
International Journal of Parallel Programming
Tradeoffs in transactional memory virtualization
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
A programmable, high performance vector array unit used for real-time motion estimation
ICME '03 Proceedings of the 2003 International Conference on Multimedia and Expo - Volume 2
Support for partial run-time reconfiguration of platform FPGAs
Journal of Systems Architecture: the EUROMICRO Journal
Optimal bit-reversal using vector permutations
Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures
Tradeoff between data-, instruction-, and thread-level parallelism in stream processors
Proceedings of the 21st annual international conference on Supercomputing
Versatility of extended subwords and the matrix register file
ACM Transactions on Architecture and Code Optimization (TACO)
Configurable data memory for multimedia processing
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Clusters Versus FPGA for Parallel Processing of Hyperspectral Imagery
International Journal of High Performance Computing Applications
An Enhanced DMA Controller in SIMD Processors for Video Applications
ARCS '09 Proceedings of the 22nd International Conference on Architecture of Computing Systems
A multi-streaming SIMD architecture for multimedia applications
Proceedings of the 6th ACM conference on Computing frontiers
Vector Processing as a Soft Processor Accelerator
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
MediaBench II video: Expediting the next generation of video systems research
Microprocessors & Microsystems
High-bandwidth Address Generation Unit
Journal of Signal Processing Systems
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices
APPT '09 Proceedings of the 8th International Symposium on Advanced Parallel Processing Technologies
Design and exploitation of a high-performance SIMD floating-point unit for Blue Gene/L
IBM Journal of Research and Development
Multiplication acceleration through twin precision
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Early-stage definition of LPX: a low power issue-execute processor
PACS'02 Proceedings of the 2nd international conference on Power-aware computer systems
PACS'02 Proceedings of the 2nd international conference on Power-aware computer systems
A multi-streaming SIMD multimedia computing engine
Microprocessors & Microsystems
Automatic vector instruction selection for dynamic compilation
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
Efficient software implementation of binary field arithmetic using vector instruction sets
LATINCRYPT'10 Proceedings of the First international conference on Progress in cryptology: cryptology and information security in Latin America
Exploiting dynamic reconfiguration of platform FPGAs: implementation issues
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Efficient Selection of Vector Instructions Using Dynamic Programming
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Parallel programming for multimedia applications
Multimedia Tools and Applications
Co-synthesis of FPGA-based application-specific floating point simd accelerators
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
SoftHV: a HW/SW co-designed processor with horizontal and vertical fusion
Proceedings of the 8th ACM International Conference on Computing Frontiers
Exploiting multilevel parallelism within modern microprocessors: DWT as a case study
VECPAR'04 Proceedings of the 6th international conference on High Performance Computing for Computational Science
SV: enhancing SIMD architectures via combined SIMD-Vector approach
ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Efficient SIMD code generation for irregular kernels
Proceedings of the 17th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming
A code generation approach for auto-vectorization in the SPADE compiler
LCPC'09 Proceedings of the 22nd international conference on Languages and Compilers for Parallel Computing
Run-time generation of partial FPGA configurations for subword operations
Microprocessors & Microsystems
Algorithms and architectures for 2D discrete wavelet transform
The Journal of Supercomputing
Improving Data Locality for Efficient In-Core Path Tracing
Computer Graphics Forum
A Simple Compressive Sensing Algorithm for Parallel Many-Core Architectures
Journal of Signal Processing Systems
DRMA: dynamically reconfigurable MPSoC architecture
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators
ACM Transactions on Computer Systems (TOCS)
Optimizing image processing on multi-core CPUs with Intel parallel programming technologies
Multimedia Tools and Applications
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Designed around the premise that multimedia will be the primary consumer of processing cycles in future PCs, AltiVec驴which Apple calls the Velocity Engine驴increases performance across a broad spectrum of media processing applications.