On dependence analysis for SIMD enhanced processors

  • Authors:
  • Patricio Bulić;Veselko Guštin

  • Affiliations:
  • Faculty of Computer and Information Science, University of Ljubljana, Ljubljana, Slovenia;Faculty of Computer and Information Science, University of Ljubljana, Ljubljana, Slovenia

  • Venue:
  • VECPAR'04 Proceedings of the 6th international conference on High Performance Computing for Computational Science
  • Year:
  • 2004

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Abstract

There are a number of data dependence tests that have been proposed in the literature. In each test there is a different trade-off between accuracy and efficiency. The most widely used approximate data dependence tests are the Banerjee inequality and the GCD test. In this paper we consider parallelization for microprocessors with a multimedia extension (the short SIMD execution model). For the short SIMD parallelism extraction it is essential that, if dependency exists, then the distance between memory references is greater than or equal to the number of data processed in the SIMD register. This implies that some loops that could not be vectorized on traditional vector processors can still be parallelized for the short SIMD execution. In all of these tests the parallelization would be prohibited when actually there is no parallelism restriction relating to the short SIMD execution model. In this paper we present a new, fast and accurate data dependence test (called D-test) for array references with linear subscripts, which is used in a vectorizing compiler for microprocessors with a multimedia extension. The presented test is suitable for use in a dependence analyzer that is organized as a series of tests, progressively increasing in accuracy, as a replacement for the GCD or Banerjee tests.