Automatic intra-register vectorization for the Intel architecture

  • Authors:
  • Aart J. C. Bik;Milind Girkar;Paul M. Grey;Xinmin Tian

  • Affiliations:
  • Intel Corporation, 2200 Mission College Blvd. SC12-301, Santa Clara, California;Intel Corporation, 2200 Mission College Blvd. SC12-301, Santa Clara, California;Intel Corporation, 2200 Mission College Blvd. SC12-301, Santa Clara, California;Intel Corporation, 2200 Mission College Blvd. SC12-301, Santa Clara, California

  • Venue:
  • International Journal of Parallel Programming
  • Year:
  • 2002

Quantified Score

Hi-index 0.00

Visualization

Abstract

Recent extensions to the Intel® Architecture feature the SIMD technique to enhance the performance of computational intensive applications that perform the same operation on different elements in a data set. To date, much of the code that exploits these extensions has been hand-coded. The task of the programmer is substantially simplified, however, if a compiler does this exploitation automatically. The high-performance Intel® C++/Fortran compiler supports automatic translation of serial loops into code that uses the SIMD extensions to the Intel® Architecture. This paper provides a detailed overview of the automatic vectorization methods used by this compiler together with an experimental validation of their effectiveness.