SCISM: a scalable compound instruction set machine
IBM Journal of Research and Development
Java intermediate bytecodes: ACM SIGPLAN workshop on intermediate representations (IR'95)
IR '95 Papers from the 1995 ACM SIGPLAN workshop on Intermediate representations
Threads primer: a guide to multithreaded programming
Threads primer: a guide to multithreaded programming
Java bytecode to native code translation: the caffeine prototype and preliminary results
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Fast, effective code generation in a just-in-time Java compiler
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Exploiting SIMD parallelism in DSP and multimedia algorithms using the AltiVec technology
ICS '99 Proceedings of the 13th international conference on Supercomputing
Java Virtual Machine Specification
Java Virtual Machine Specification
The Java Language Specification
The Java Language Specification
DSP Processors Hit the Mainstream
Computer
The TigerSHARC DSP Architecture
IEEE Micro
IEEE Transactions on Computers
High-Performance 3-1 Interlock Collapsing ALU's
IEEE Transactions on Computers
The Delft-Java Engine: An Introduction
Euro-Par '97 Proceedings of the Third International Euro-Par Conference on Parallel Processing
ManArray Processor Interconnection Network: An Introduction
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Instruction Folding in Java Processor
ICPADS '97 Proceedings of the 1997 International Conference on Parallel and Distributed Systems
MFAST: a single chip highly parallel image processing architecture
ICIP '95 Proceedings of the 1995 International Conference on Image Processing (Vol. 1)-Volume 1 - Volume 1
DELFT-JAVA Link Translation Buffer
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
Architecture of a digital signal processor
IBM Journal of Research and Development
Reducing stack usage in Java bytecode execution
ACM SIGARCH Computer Architecture News
Toba: java for applications a way ahead of time (WAT) compiler
COOTS'97 Proceedings of the 3rd conference on USENIX Conference on Object-Oriented Technologies (COOTS) - Volume 3
An efficient algorithm for exploiting multiple arithmetic units
IBM Journal of Research and Development
Hi-index | 0.00 |
In this paper we explore design techniques and constraints for enabling high-speed Java-enabled wireless devices. Since Java execution may be required for 3G devices, efficient methods of executing Java bytecode are explored. We begin by setting a historical context for DSP architectures and describe salient characteristics of classical, transitional, and modern DSP architectures. We then discuss methods of executing Java bytecode - both software and hardware - and discuss the merits of each approach. We next describe the Delft-Java engine that we designed at Delft Technical University in the Netherlands. Finally, we compare this design to other techniques and comment on ways that Sandbridge Technologies is modifying organizational characteristics to achieve power-efficient Java execution.