Improving Java performance using hardware translation
ICS '01 Proceedings of the 15th international conference on Supercomputing
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Embedded processor design challenges
Exploiting an abstract-machine-based framework in the design of a Java ILP processor
Journal of Systems Architecture: the EUROMICRO Journal
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A novel JAVA processor for embedded devices
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
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We describe the hardware support in the DELFT-JAVA processor which enables efficient dynamic linking of JAVA programs. The proposed mechanism supports method invocationof dynamically linked classes through the use of a Link Translation Buffer (LTB). Since our Instruction Set Architecture directly supports dynamically linked method invocation, the Link Translation Buffer is architecturally transparent to the executing program. The operation ofthe LTB is described and preliminary performance results are reported. Method invocation differences between the C++ programming language and the JAVA programming language are outlined. Preliminary performance results for the Link Translation Buffer suggest that program performance may improve from 1.1x to 1.5x when a suitable LTB is used to cache frequently utilized methods.