The Design of an Optimizing Compiler
The Design of an Optimizing Compiler
Incremental Collection of Mature Objects
IWMM '92 Proceedings of the International Workshop on Memory Management
Generation Scavenging: A non-disruptive high performance storage reclamation algorithm
SDE 1 Proceedings of the first ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments
Using complete system simulation to characterize SPECjvm98 benchmarks
Proceedings of the 14th international conference on Supercomputing
Proceedings of the ACM 2000 conference on Java Grande
Allowing for ILP in an embedded Java processor
Proceedings of the 27th annual international symposium on Computer architecture
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
System design based on single language and single-chip Java ASIP microcontroller
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Java Runtime Systems: Characterization and Architectural Implications
IEEE Transactions on Computers
Techniques for obtaining high performance in Java programs
ACM Computing Surveys (CSUR)
Characterizing operating system activity in SPECjvm98 Benchmarks
Workload characterization of emerging computer applications
Exploiting Java instruction/thread level parallelism with horizontal multithreading
ACSAC '01 Proceedings of the 6th Australasian conference on Computer systems architecture
Adapting Tomasulo's algorithm for bytecode folding based Java processors
ACM SIGARCH Computer Architecture News - Special Issue: PACT 2001 workshops
Improving the memory management performance of RTSJ
JGI '02 Proceedings of the 2002 joint ACM-ISCOPE conference on Java Grande
An analytical POC stack operations folding for continuous and discontinuous Java bytecodes
Journal of Systems Architecture: the EUROMICRO Journal
Making Java Work for Microcontroller Applications
IEEE Design & Test
Java Bytecode Optimization with Advanced Instruction Folding Mechanism
ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Exploiting Java Bytecode Parallelism by Enhanced POC Folding Model (Research Note)
Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
Pipelined Java Virtual Machine Interpreters
CC '00 Proceedings of the 9th International Conference on Compiler Construction
Run-Time Adaptive Flexible Instruction Processors
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Embedded processor design challenges
An Advanced Instruction Folding Mechanism for a Stackless Java Processor
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Efficient formal verification of pipelined processors with instruction queues
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Code protection for resource-constrained embedded devices
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Dynamic coalescing for 16-bit instructions
ACM Transactions on Embedded Computing Systems (TECS)
High performance annotation-aware JVM for Java cards
Proceedings of the 5th ACM international conference on Embedded software
A cache based stack folding technique for high performance Java processors
JTRES '06 Proceedings of the 4th international workshop on Java technologies for real-time and embedded systems
A comparison of software and hardware techniques for x86 virtualization
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
JIST: Just-In-Time scheduling translation for parallel processors
Scientific Programming
Energy behavior of java applications from the memory perspective
JVM'01 Proceedings of the 2001 Symposium on JavaTM Virtual Machine Research and Technology Symposium - Volume 1
On the software virtual machine for the real hardware stack machine
JVM'01 Proceedings of the 2001 Symposium on JavaTM Virtual Machine Research and Technology Symposium - Volume 1
JTRES '07 Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems
Dual-execution mode processor architecture
The Journal of Supercomputing
A predecoding technique for ILP exploitation in Java processors
Journal of Systems Architecture: the EUROMICRO Journal
Exploiting an abstract-machine-based framework in the design of a Java ILP processor
Journal of Systems Architecture: the EUROMICRO Journal
Efficient compilation for queue size constrained queue processors
Parallel Computing
A Reconfigurable Processor Infrastructure for Accelerating Java Applications
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Extending an embedded RISC microprocessor for efficient translation based Java execution
Microprocessors & Microsystems
JubiTool: unified design flow for the Perplexus SIMD hardware accelerator
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Compiling for Reduced Bit-Width Queue Processors
Journal of Signal Processing Systems
A hardware peripheral for Java bytecodes translation acceleration
Proceedings of the 2010 ACM Symposium on Applied Computing
ICHIT'06 Proceedings of the 1st international conference on Advances in hybrid information technology
Designing a java microcontroller to specific applications
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Dual-execution mode processor architecture for embedded applications
Journal of Mobile Multimedia
Java type confusion and fault attacks
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
Programming languages for real-time systems
Embedded Systems Design
A novel JAVA processor for embedded devices
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
HISC: A computer architecture using operand descriptor
Computers and Electrical Engineering
About 15 years of real-time Java
Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems
Hi-index | 4.10 |
Key to the central promise inherent in Java technology-"write once, run anywhere"-is the fact that Java programs run on the Java virtual machine, insulating them from any contact with the underlying hardware. Consequently, Java programs must execute indirectly through a translation layer built into the Java virtual machine. Translation essentially converts Java virtual machine instructions (called byte-codes) into corresponding machine-specific binary instructions. Bytecode is a single image of a program that will execute identically (in principle) on any system equipped with a JVM. The first step toward the development of a new class of Java processors was the creation of the bytecode execution engine itself, called the picoJava core. PicoJava directly executes Java bytecode instructions and provides hardware support for other essential functions of the JVM. Executing bytecode instructions in hardware eliminates the need for dynamic translation, thus extending the useful range of Java bytecode programs to embedded environments. By the end of 1998, Java processors like Sun's microJava 701 should be available for evaluation from several licensees of the picoJava core technology