HISC: A computer architecture using operand descriptor

  • Authors:

  • Yijun Liu;Anthony S. Fong;Fangyang Shen

  • Affiliations:

  • Faculty of Computer, Guangdong University of Technology, University Mega Center, Guangzhou 51006, China;Department of Electronic Engineering, City University of Hong Kong, 83 Tat Chee Avenue, Kowloon, Hong Kong;Department of Computer Systems Technology, New York City College of Technology, CUNY, 300 Jay Street, Brooklyn, New York, 11201, USA

  • Venue:
  • Computers and Electrical Engineering
  • Year:
  • 2012

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Abstract

Computing has been evolved from number crunching to today's cloud. Data are no longer numbers but information which needs to be appropriately guarded and easily transportable, but the original von Neumann instruction model does not support them architecturally. This led us to start a new architecture named HISC (High-level Instruction Set Computer), to attach attributes to individual operand on instruction for effective and efficient processing of today's computing. HISC instruction consists of an operation code (opcode), and an index to source or destination operand referenced by an operand descriptor, which contains value and attributes for the operand. The value and attributes can be accessed and processed in parallel with execution stages, introducing zero or low clock cycle overheads. Object-oriented programming (OOP) requires strict access control for the data. The JAVA model, jHISC, executes Java object-oriented program not only faster than software JVMs but has less cycles-per-instruction than other hardware Java processors. We also propose future extensions for operand descriptor beyond OOP.