Extending an embedded RISC microprocessor for efficient translation based Java execution

Authors:
Isidoros Sideris;Kiamal Pekmestzi;George Economakos
Affiliations:
Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece;Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece;Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece
Venue:
Microprocessors & Microsystems
Year:
2009

Citing 11
Cited 0

Java Microarchitectures

Java Microarchitectures
PicoJava: A Direct Execution Engine For Java Bytecode

Computer
Compiling Java Just in Time

IEEE Micro
High-Performance RISC Microprocessors

IEEE Micro
Dynamic binary translation for accumulator-oriented architectures

Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
The TM3270 Media-Processor

Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Virtual Machines: Versatile Platforms for Systems and Processes (The Morgan Kaufmann Series in Computer Architecture and Design)

Virtual Machines: Versatile Platforms for Systems and Processes (The Morgan Kaufmann Series in Computer Architecture and Design)
Speculative optimization using hardware-monitored guarded regions for java virtual machines

Proceedings of the 3rd international conference on Virtual execution environments
picoJava-II in an FPGA

JTRES '07 Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems
A Java processor architecture for embedded real-time systems

Journal of Systems Architecture: the EUROMICRO Journal
A predecoding technique for ILP exploitation in Java processors

Journal of Systems Architecture: the EUROMICRO Journal

Quantified Score

Hi-index	0.00

Visualization

Abstract

Java has gained great popularity in embedded appliances such as set-top boxes, smart phones and other hand held devices. In this paper we propose a translation based hw/sw codesigned Java virtual machine architecture, which extends a typical embedded RISC processor. The architectural extensions we propose include special instructions that accelerate translated blocks dispatch and security checks for arrays and objects. The extensions are done in a way that operating systems support is maintained, something that makes their adoption more attractive. Benchmarking using Embedded Caffeine Mark (ECM) benchmarks, showed significant speedups, especially when high performance RISC processors are employed.