Stack computers: the new wave
IEEE Transactions on Computers
Allowing for ILP in an embedded Java processor
Proceedings of the 27th annual international symposium on Computer architecture
Inside the Java Virtual Machine
Inside the Java Virtual Machine
Advanced Computer Architectures
Advanced Computer Architectures
Java Language Specification, Second Edition: The Java Series
Java Language Specification, Second Edition: The Java Series
The Delft-Java Engine: An Introduction
Euro-Par '97 Proceedings of the Third International Euro-Par Conference on Parallel Processing
Characterization of Java Applications at Bytecode and Ultra-SPARC Machine Code Levels
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
Microarchitectural techniques to enable efficient java execution
Microarchitectural techniques to enable efficient java execution
A cache based stack folding technique for high performance Java processors
JTRES '06 Proceedings of the 4th international workshop on Java technologies for real-time and embedded systems
A predecoding technique for ILP exploitation in Java processors
Journal of Systems Architecture: the EUROMICRO Journal
Application requirements and efficiency of embedded Java bytecode multi-cores
Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems
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A novel processor architecture for hardware execution of Java bytecodes is presented. Stack dependency is resolved by the use of a hardware bytecode folding algorithm coupled with Tomasulo's scheduling algorithm. In this paper, we present a framework for adapting Tomasulo's algorithm for bytecode folding based Java processors. We discuss a set of architectural features that are tailored for Java execution as well as for general-purpose Java-independent codes. A comprehensive example is included to illustrate these features graphically.