Efficient software architecture for IPSec acceleration using a programmable security processor
Proceedings of the conference on Design, automation and test in Europe
Introduction to the wire-speed processor and architecture
IBM Journal of Research and Development
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Internet Protocol Security (IPSec) is proposed to provide security services at the IP layer in both the IPv4 and the IPv6 environment. It is composed of a set of protocols that utilizes cryptographic algorithms to encrypt and authenticate packets. This security mechanism has been widely deployed to implement Virtual Private Networks (VPNs). To protect data during transmission and ensure data integration after transmission, both of the forward and the inverse cryptographic operations suffer from a very high cost of computation load. To lower down this cost, various hardware accelerators have been developed to offload these operations from the core CPU. Among them, Intel had integrated three security accelerators in its XScale core. On top of them, we had developed software modules to upgrade the performance of IPSec applications. Results show that acceleration has been achieved. In terms of network throughput, hardwareaided solutions have an average of 2.7 times faster than the software solutions.