Automatic PC board routing cleanup procedures

Authors:
R. J. Smith;R. N. Castleton;W. J. Kaminsky
Affiliations:
Lawrence Livermore Laboratory, Livermore, California;Lawrence Livermore Laboratory, Livermore, California;University of Illinois, Urbana, Illinois
Venue:
ACM SIGDA Newsletter
Year:
1976

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Cited 1

Verification and optimization for LSI & PCB layout

DAC '81 Proceedings of the 18th Design Automation Conference

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Abstract

Automatic routing programs produce layouts which contain features that could be improved. This paper describes straightforward techniques for layout improvement that are routing algorithm independent.