Bias Current Generators with Wide Dynamic Range

  • Authors:
  • Tobi Delbrück;André Van Schaik

  • Affiliations:
  • Institute of Neuroinformatics, ETH Zürich, and the University of Zürich, Zürich, Switzerland CH-8057;School of Electrical and Information Engineering, The University of Sydney, Australia

  • Venue:
  • Analog Integrated Circuits and Signal Processing
  • Year:
  • 2005

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Abstract

Mixed-signal or analog chips often require a wide range of biasing currents that are independent of process and supply voltage and that are proportional to absolute temperature. This paper describes CMOS circuits that we use to generate a set of fixed bias currents typically spanning six decades at room temperature down to a few times the transistor off-current. A bootstrapped current reference with a new startup and power-control mechanism generates a master current, which is successively divided by a current splitter to generate the desired reference currents. These references are nondestructively copied to form the chip's biases. Measurements of behavior, including temperature effects from 1.6 and 0.35 驴 implementations, are presented and nonidealities are investigated. Temperature dependence of the transistor off-current is investigated because it determines the lower limit for generated currents. Readers are directed to a design kit that allows easy generation of the complete layout for a bias generator with a set of desired currents for scalable MOSIS CMOS processes.