Increasing Data TLB Resilience to Transient Errors

  • Authors:
  • Feihui Li;Mahmut Kandemir

  • Affiliations:
  • Pennsylvania State University;Pennsylvania State University

  • Venue:
  • ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
  • Year:
  • 2005

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Abstract

This paper first demonstrates that a large fraction of data TLB entries are dead (i.e., not used again before being replaced) for many applications at any given time during execution. Based on this observation, it then proposes two alternate schemes that replicate actively accessed data TLB entries in these dead entries to increase the resilience of the TLB against transient errors.