SCCP/x: a compilation profile to support testing and verification of optimized code
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
The worst-case execution-time problem—overview of methods and survey of tools
ACM Transactions on Embedded Computing Systems (TECS)
Verification across intellectual property boundaries
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Methods of assessing the time efficiency in the virtual measurement systems
Computer Standards & Interfaces
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In the last years the number of electronic control systems has increased significantly. In order to stay competitive more and more functionality is integrated into more and more powerful and complex computer hardware. Due to these advances in control systems engineering new challenges for analyzing the timing behavior of real-time computer systems arise. The two identified main challenges are execution-time modeling of the hardware and the path problem that forbids capturing the worst-case execution time (WCET) by end-to-end measurements due to limits in computational complexity. This work presents the cornerstones of our new measurement-based WCET analysis method that successfully addresses these problems. We clearly identify our research goals and the relevance of our research. Especially, the novel aspects of our approach are emphasized. The conclusion is formed by a brief presentation of an industrial-size case study application.